AD6679 datasheet(66/82 Pages) AD

66 / 82 page

Data Sheet

AD6679

Rev. B | Page 65 of 81

SYNC± SETUP AND HOLD WINDOW MONITOR

To assist in ensuring a valid SYNC± capture, the AD6679 has a

SYNC± setup and hold window monitor. This feature allows the

system designer to determine the location of the SYNC± signals

relative to the CLK± signals by reading back the amount of

setup and hold margin on the interface through the memory

map. Figure 85 and Figure 86 show both the setup and hold

status values, respectively, for different phases of SYNC±. The

setup detector returns the status of the SYNC± signal before the

CLK± edge and the hold detector returns the status of the

SYNC± signal after the CLK± edge. Register 0x128 stores the

status of SYNC± and indicates whether the SYNC± signal was

captured by the ADC.

VALID

REG 0x128[3:0]

CLK±

INPUT

SYNC±

INPUT

FLIP FLOP

HOLD (MIN)

FLIP FLOP

HOLD (MIN)

FLIP FLOP

SETUP (MIN)

–1

–2

–3

–4

–5

–6

–7

–8

Figure 85. SYNC ± Setup Detector

AD6679 数据表(PDF) 66 Page - Analog Devices

AD6679 数据表(HTML) 66 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82

数据表下载

链接网址

AD6679 数据表(PDF) 66 Page - Analog Devices

AD6679 数据表(HTML) 66 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82

数据表 下载

链接网址

数据表下载