Philips Semiconductors

Preliminary data

PCA9530

2002 Dec 12

7

Bus transactions

0A0

12

SCL

WRITE TO

REGISTER

DATA OUT

FROM PORT

3

4

567

8

SDA

S0

A

A

A

11

0

0

0

DATA 1

slave address

data to register

start condition

R/W

acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

DATA 1 VALID

SW01014

9

B0

0

0

0

AI

0

B2

B1

command byte

Figure 9. WRITE to register

0

0

0

0

0

0

A0

1

1

0

0

A0

1

1

S0

A

A

A

acknowledge

from slave

R/W

acknowledge

from slave

A

P

NA

acknowledge

from slave

acknowledge

from master

S

DATA

DATA

R/W

first byte

at this moment master-transmitter

becomes master-receiver and

slave-receiver becomes

slave-transmitter

last byte

SW01098

no acknowledge

from master

1

slave address

data from register

data from register

slave address

auto-increment

register address

if AI = 1

0

0

0

AI

0B2

B1 B0

Figure 10. READ from register

11

0

0

0

0

A0

READ FROM

PORT

DATA INTO

PORT

SDA

S1

A

A

DATA 1

DATA 4

slave address

data from port

data from port

start condition

R/W

acknowledge

from slave

acknowledge

from master

stop

condition

DATA 4

DATA 2

P

DATA 3

SW01095

no acknowledge

from master

NA

DATA 1

NOTES:

1. This figure assumes the command byte has previously been programmed with 00h.

Figure 11. READ input port register