AD2S99

REV. B

–6–

AD2S99/AD2S82A TYPICAL CONFIGURATION

Figure 4 shows a typical circuit configuration for the AD2S99

Oscillator and the AD2S82A Resolver-to-Digital Converter.

The maximum level of the SIN and COS input signals to the

AD2S82A should be 2 V rms

±10%. All the analog ground sig-

nals should be star connected to the AD2S82A AGND pin. If

shielded twisted pair cables are used for the resolver signals, the

shields should also be terminated at the AD2S82A AGND pin.

Coupling capacitor C3, and resistor to GND R3, between the

SYNREF output of the AD2S99 and the REF input pin of the

AD2S82A are optional. For additional information on selecting

component values for the AD2S82A, please refer to the

AD2S82A data sheet or the application note “Passive Compo-

nent Selection and Dynamic Modeling for the AD2S80 Series

Resolver-to-Digital Converters” (AN-266).

44

1

2

64

5

21

24

23

22

18

20

19

39

38

35

34

33

37

36

3

7

8

11

12

13

9

10

40

41

42

25

28

27

26

43

31

30

29

32

15

16

17

14

TOP VIEW

(Not to Scale)

AD2S82A

DB2

DB6

SIN

I/P

MSB DB1

NC

DB3

DB4

DB5

DB7

DB8

RC

DATA LOAD

COMP

SC2

DIR

BUSY

INHIBIT

NC

SC1

DIGITAL GND

COS

SIN

REF

RESOLVER

AGND

0V

–12V

R6

R4

R1

C5

R5

C4

C2

C1

R2

C3

R3

R3, C3 OPTIONAL

VELOCITY

OUTPUT

+12V

AGND

+5V

DGND

DIGITAL

OUTPUT

DATA

+5V

10µF

0.1µF

0.1µF

10µF

0.1µF

10µF

NC = NO CONNECT

NC

SIN

NC

DGND

COS

EXC

EXC

NC

AGND

NC

19

3

1

2

20

4

5

8

6

7

12 13

911

10

18

17

14

16

15

TOP VIEW

(Not to Scale)

AD2S99

–5V

SYNREF

COS

SIN

50k

LOS

SEL1 = GND

0.1µF

4.7µF

0.1µF

4.7µF

Figure 4. AD2S99 and AD2S82A Example Configuration