AD9857SLASHPCB datasheet(16/41 Pages) AD

16 / 41 page

AD9857

Rev. C| Page 15 of 40

MODES OF OPERATION

The AD9857 has three operating modes:

•

Quadrature modulation mode (default)

•

Single-tone mode

•

Interpolating DAC mode

Mode selection is accomplished by programming a control

scale multiplier are available in all three modes.

QUADRATURE MODULATION MODE

In quadrature modulation mode, both the I and Q data paths

are active. A block diagram of the AD9857 operating in the

quadrature modulation mode is shown in Figure 18.

In quadrature modulation mode, the PDCLK/FUD pin is an

output and functions as the parallel data clock (PDCLK), which

serves to synchronize the input of data to the AD9857. In this

mode, the input data must be synchronized with the rising edge

of PDCLK. The PDCLK operates at twice the rate of either the I

or Q data path. This is due to the fact that the I and Q data must

be presented to the parallel port as two 14-bit words

multiplexed in time. One I word and one Q word together

comprise one internal sample. Each sample is propagated along

the internal data pathway in parallel fashion.

The DDS core provides a quadrature (sin and cos) local

oscillator signal to the quadrature modulator, where the I and Q

data are multiplied by the respective phase of the carrier and

summed together, to produce a quadrature-modulated data

stream.

All of this occurs in the digital domain, and only then is the

digital data stream applied to the 14-bit DAC to become the

quadrature-modulated analog output signal.

14-BIT

DAC

DAC_RSET

IOUT

OUTPUT

SCALE

VALUE

REFCLK

MODE

CONTROL

PLL

LOCK

CLOCK

INPUT

MODE

AD9857

PARALLEL

DATA IN

(14-BIT)

PDCLK/

FUD

INVERSE

CIC FILTER

INV

CIC

(4 )

CIC

(2 - 63 )

FIXED

INTER-

POLATOR

PROGRAMMABLE

INTERPOLATOR

QUADRATURE

MODULATOR

INVERSE

SINC

FILTER

TUNING

WORD

TIMING AND CONTROL

DDS

CORE

CLOCK

MULTIPLIER

(4 – 20 )

PROFILE

SELECT

LOGIC

CONTROL REGISTERS

RESET

CIC

OVERFLOW

SERIAL

PORT

PS0

PS1

POWER-

DOWN

LOGIC

DIGITAL

POWER-

DOWN

TxENABLE

Figure 18. Quadrature Modulation Mode

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