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ATA6830 数据表(PDF) 7 Page - ATMEL Corporation

部件名 ATA6830
功能描述  INTELLIGENT STEPPER MOTOR DRIVER
PDF  23 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  ATMEL [ATMEL Corporation]
网页  http://www.atmel.com
标志 ATMEL - ATMEL Corporation

ATA6830 数据表(HTML) 7 Page - ATMEL Corporation

Back Button ATA6830 Datasheet HTML 3Page - ATMEL Corporation ATA6830 Datasheet HTML 4Page - ATMEL Corporation ATA6830 Datasheet HTML 5Page - ATMEL Corporation ATA6830 Datasheet HTML 6Page - ATMEL Corporation ATA6830 Datasheet HTML 7Page - ATMEL Corporation ATA6830 Datasheet HTML 8Page - ATMEL Corporation ATA6830 Datasheet HTML 9Page - ATMEL Corporation ATA6830 Datasheet HTML 10Page - ATMEL Corporation ATA6830 Datasheet HTML 11Page - ATMEL Corporation Next Button
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7
ATA6830
4575C–BCD–05/03
Figure 6. Synchronization Sequence
Between two commands a pause has to be included. This is necessary for a clear rec-
ogition of a new message frame (command). Figure 7 shows the timing diagram of two
commands.
Figure 7. Message Frame and Space
Every command consists of 16 bits. They will be sent with two bytes. Figure 8 shows the
message frame. The high byte is sent first, immediately followed by the low byte. Every
byte starts with a start bit and ends with a parity bit and a stop bit. The first start bit (level
0) after a pause (level 1) indicates the beginning of a new message frame. The value of
the parity bit has to be odd, i.e., the crossfooting of the byte including the parity bit is
odd. If a data packet is not recognized due to a transmission error (parity error), the
entire command is rejected.
Figure 8. Command Bits
START
BIT
STOP
BIT
PARITY
BIT
PARITY
BIT
STOP
BIT
START
BIT
SYNCHRONIZATION PATTERN
MESSAGE FRAME
HIGH BYTE
LOW BYTE
SPACE
7
HIGH BYTE
START
BIT
STOP
BIT
6
5
4
3
2
1
0
PARITY
BIT
8 DATA
BITS
7
6
5
4
3
2
1
0
PARITY
BIT
8 DATA
BITS
LOW BYTE
STOP
BIT
START
BIT
MESSAGE FRAME



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