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AD7680BRJZ-R2 数据表(PDF) 15 Page - Analog Devices |
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AD7680BRJZ-R2 数据表(HTML) 15 Page - Analog Devices |
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15 / 25 page ![]() AD7680 Rev. A | Page 14 of 24 MODES OF OPERATION The mode of operation of the AD7680 is selected by controlling the (logic) state of the CS signal during a conversion. There are two possible modes of operation, normal and power-down. The point at which CS is pulled high after the conversion has been initiated determines whether or not the AD7680 enters power- down mode. Similarly, if the AD7680 is already in power-down, CS can control whether the device returns to normal operation or remains in power-down. These modes of operation are designed to provide flexible power management options. These options can optimize the power dissipation/throughput rate ratio for differing application requirements. NORMAL MODE This mode provides the fastest throughput rate performance, because the user does not have to worry about the power-up times with the AD7680 remaining fully powered all the time. Figure 16 shows the general diagram of the operation of the AD7680 in this mode. The conversion is initiated on the falling edge of CS as described in the section. To ensure that the part remains fully powered up at all times, Serial Interface CS must remain low until at least 10 SCLK falling edges have elapsed after the falling edge of CS. If CS is brought high any time after the 10th SCLK falling edge, but before the 20th SCLK falling edge, the part remains powered up, but the conversion is terminated and SDATA goes back into three-state. At least 20 serial clock cycles are required to complete the conversion and access the complete conversion result. In addition, a total of 24 SCLK cycles accesses four trailing zeros. CS may idle high until the next conversion or may idle low until CS returns high sometime prior to the next conversion, effectively idling CS low. Once a data transfer is complete (SDATA has returned to three- state), another conversion can be initiated after the quiet time, tQUIET, has elapsed by bringing CS low again. 110 20 4 LEADING ZEROS + CONVERSION RESULT CS SCLK SDATA Figure 16. Normal Mode Operation |
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