AD7679ASTZ datasheet(19/29 Pages) AD

19 / 29 page

AD7679

Rev. A | Page 18 of 28

The SNR degradation due to the amplifier is

⎟

⎠

⎞

⎜

⎝

⎛

)

(

625

log

3dB

–

LOSS

SNR

where:

f–3dB is the –3 dB input bandwidth in MHz of the AD7679

(26 MHz) or the cutoff frequency of the input filter, if used.

N is the noise factor of the amplifiers (1 if in buffer

configuration).

eN is the equivalent input noise voltage of each op amp in

nV/√Hz.

For instance, for a driver with an equivalent input noise of

2 nV/√Hz (e.g., AD8021) configured as a buffer, thus with

a noise gain of +1, the SNR degrades by only 0.34 dB with

the filter in Figure 25, and by 1.8 dB without it.

•

The driver needs to have a THD performance suitable to

that of the AD7679.

The AD8021 meets these requirements and is usually

appropriate for almost all applications. The AD8021 needs a

10 pF external compensation capacitor, which should have good

linearity as an NPO ceramic or mica type.

The AD8022 could be used if a dual version is needed and gain

of 1 is present. The AD829 is an alternative in applications

where high frequency (above 100 kHz) performance is not

required. In gain of 1 applications, it requires an 82 pF

compensation capacitor. The AD8610 is another option when

low bias current is needed in low frequency applications.

Single-to-Differential Driver

For applications using unipolar analog signals, a single-ended-

to-differential driver will allow for a differential input into the

part. The schematic is shown in Figure 29. When provided an

input signal of 0 to VREF, this configuration will produce a

differential ±VREF with midscale at VREF/2.

If the application can tolerate more noise, the AD8138,

differential driver can be used.

8.25k

2.5V

AD8021

590

AD7679

IN+

IN– REF

ANALOG INPUT

(UNIPOLAR

0V TO 4.096V)

10pF

AD8021

590

10pF

μF

100nF

1.82k

2.7nF

REFBUFIN

03085-0-031

Figure 29. Single-Ended-to-Differential Driver Circuit

(Internal Reference Buffer Used)

Voltage Reference

The AD7679 allows the use of an external voltage reference

either with or without the internal reference buffer.

Using the internal reference buffer is recommended when

sharing a common reference voltage between multiple ADCs is

desired.

However, the advantages of using the external reference voltage

directly are

•

The SNR and dynamic range improvement (about 1.7 dB)

resulting from the use of a reference voltage very close to

the supply (5 V) instead of a typical 4.096 V reference

when the internal buffer is used.

•

The power saving when the internal reference buffer is

powered down (PDBUF high).

To use the internal reference buffer, PDBUF should be LOW. A

2.5 V reference voltage applied on the REFBUFIN input will

result in a 4.096 V reference on the REF pin.

In both cases, the voltage reference input REF has a dynamic

input impedance and therefore requires an efficient decoupling

between REF and REFGND inputs. The decoupling consists of

a low ESR 47 μF tantalum capacitor connected to the REF and

REFGND inputs with minimum parasitic inductance.

Care should also be taken with the reference temperature

coefficient of the voltage reference, which directly affects the

full-scale accuracy if this parameter matters. For instance, a

±4 ppm/°C temperature coefficient of the reference changes the

full scale by ±1 LSB/°C.

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