the LP396X. Derating must be applied to the manufacturer’s

ESR specification, since it is typically only valid at room

temperature.

Any applications using aluminum electrolytics should be

thoroughly tested at the lowest ambient operating tempera-

ture where ESR is maximum.

PCB LAYOUT

Good PC layout practices must be used or instability can be

induced because of ground loops and voltage drops. The

input and output capacitors must be directly connected to the

input, output, and ground pins of the LP3962/5 using traces

which do not have other currents flowing in them Kelvin

connect).

The best way to do this is to lay out C

device with short traces to the V

The regulator ground pin should be connected to the exter-

nal circuit ground so that the regulator and its capacitors

have a ’single point ground’.

It should be noted that stability problems have been seen in

applications where ’vias’ to an internal ground plane were

used at the ground points of the LP3962/5 IC and the input

and output capacitors. This was caused by varying ground

potentials at these nodes resulting from current flowing

through the ground plane. Using a single point ground tech-

nique for the regulator and it’s capacitors fixed the problem.

Since high current flows through the traces going into V

IN

and coming from V

these pins so there is no voltage drop in series with the input

and output capacitors.

RFI/EMI SUSCEPTIBILITY

RFI (radio frequency interference) and EMI (electromagnetic

interference) can degrade any integrated circuit’s perfor-

mance because of the small dimensions of the geometries

inside the device. In applications where circuit sources are

present which generate signals with significant high fre-

ensure that this does not affect the IC regulator.

If RFI/EMI noise is present on the input side of the LP396X

regulator (such as applications where the input source

comes from the output of a switching regulator), good ce-

ramic bypass capacitors must be used at the input pin of the

LP396X.

If a load is connected to the LP396X output which switches

at high speed (such as a clock), the high-frequency current

pulses required by the load must be supplied by the capaci-

tors on the LP396X output. Since the bandwidth of the

regulator loop is less than 100 kHz, the control circuitry

cannot respond to load changes above that frequency. The

means the effective output impedance of the LP396X at

frequencies above 100 kHz is determined only by the output

capacitor(s).

In applications where the load is switching at high speed, the

output of the LP396X may need RF isolation from the load. It

is recommended that some inductance be placed between

the LP396X output capacitor and the load, and good RF

bypass capacitors be placed directly across the load.

PCB layout is also critical in high noise environments, since

RFI/EMI is easily radiated directly into PC traces. Noisy

circuitry should be isolated from ’clean’ circuits where pos-

sible, and grounded through a separate path. At MHz fre-

quencies, ground planes begin to look inductive and

RFI/EMI can cause ground bounce across the ground plane.

In multi-layer PCB applications, care should be taken in

layout so that noisy power and ground planes do not radiate

directly into adjacent layers which carry analog power and

ground.

Output Adjustment

An adjustable output device has output voltage range of

1.215V to 5.1V. To obtain a desired output voltage, the

following equation can be used with R1 always a 10k

Ω

resistor.

For output stability, C

Output Noise

Noise is specified in two ways-

Spot Noise or Output noise density is the RMS sum of all

noise sources, measured at the regulator output, at a spe-

cific frequency (measured with a 1Hz bandwidth). This type

of noise is usually plotted on a curve as a function of fre-

quency.

Total output Noise or Broad-band noise is the RMS sum

of spot noise over a specified bandwidth, usually several

decades of frequencies.

Attention should be paid to the units of measurement. Spot

noise is measured in units µV/

noise is measured in µV(rms).

The primary source of noise in low-dropout regulators is the

internal reference. In CMOS regulators, noise has a low

frequency component and a high frequency component,

which depend strongly on the silicon area and quiescent

current. Noise can be reduced in two ways: by increasing the

transistor area or by increasing the current drawn by the

internal reference. Increasing the area will decrease the

chance of fitting the die into a smaller package. Increasing

the current drawn by the internal reference increases the

total supply current (ground pin current). Using an optimized

trade-off of ground pin current and die size, LP3962/LP3965

achieves low noise performance and low quiescent current

operation.

The total output noise specification for LP3962/LP3965 is

presented in the Electrical Characteristics table. The Output

noise density at different frequencies is represented by a

curve under typical performance characteristics.

Short-Circuit Protection

The LP3962and LP3965 is short circuit protected and in the

event of a peak over-current condition, the short-circuit con-

trol loop will rapidly drive the output PMOS pass element off.

Once the power pass element shuts down, the control loop

will rapidly cycle the output on and off until the average

power dissipation causes the thermal shutdown circuit to

respond to servo the on/off cycling to a lower frequency.

Please refer to the section on thermal information for power

dissipation calculations.

Error Flag Operation

The LP3962/LP3965 produces a logic low signal at the Error

Flag pin when the output drops out of regulation due to low

input voltage, current limiting, or thermal limiting. This flag

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