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AD7653ASTZ 数据表(PDF) 19 Page - Analog Devices

部件名 AD7653ASTZ
功能描述  16-Bit 1 MSPS PulSAR Unipolar ADC with Reference
PDF  27 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD7653ASTZ 数据表(HTML) 19 Page - Analog Devices

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AD7653
Data Sheet
Rev. C | Page 18 of 26
Voltage Reference Input
The AD7653 allows the choice of either a very low temperature
drift internal voltage reference or an external 2.5 V reference.
Unlike many ADCs with internal references, the internal
reference of the AD7653 provides excellent performance and
can be used in almost all applications.
To use the internal reference along with the internal buffer,
PDREF and PDBUF should both be LOW. This will produce a
1.207 V voltage on REFBUFIN which, amplified by the buffer,
will result in a 2.5 V reference on the REF pin.
The output impedance of REFBUFIN is 11 kΩ (minimum)
when the reference is enabled. It is useful to decouple
REFBUFIN with a 100 nF ceramic capacitor. Thus, the 100 nF
capacitor provides an RC filter for noise reduction.
To use an external reference along with the internal buffer,
PDREF should be HIGH and PDBUF should be LOW. This
powers down the internal reference and allows the 2.5 V
reference to be applied to REFBUFIN.
To use an external reference directly on the REF pin, PDREF
and PDBUF should both be HIGH.
PDREF and PDBUF, respectively, power down the internal
reference and the internal reference. Note that the PDREF and
PDBUF input current should never exceed 20 mA. This could
eventually occur when input voltage is above AVDD (for
instance at power-up). In this case, a 100 Ω series resistor is
recommended.
The internal reference is temperature compensated to 2.5 V ±
20 mV. The reference is trimmed to provide a typical drift of 7
ppm/°C. This typical drift characteristic is shown in Figure 17.
For improved drift performance, an external reference such as
the AD780 can be used.
The AD7653 voltage reference input REF has a dynamic input
impedance; it should, therefore, be driven by a low impedance
source with efficient decoupling between the REF and
REFGND inputs. This decoupling depends on the choice of the
voltage reference, but usually consists of a low ESR capacitor
connected to REF and REFGND with minimum parasitic
inductance. A 10 μF (X5R, 1206 size) ceramic chip capacitor (or
47 μF tantalum capacitor) is appropriate when using either the
internal reference or one of these recommended reference
voltages:
The low noise, low temperature drift ADR421 and AD780
The low power ADR291
The low cost AD1582
For applications that use multiple AD7653s, it is more effective
to use the internal buffer to buffer the reference voltage.
Care should be taken with the voltage reference’s temperature
coefficient, which directly affects the full-scale accuracy, if this
parameter matters. For instance, a ±15 ppm/°C temperature
coefficient of the reference changes full scale by ±1 LSB/°C.
Note that VREF can be increased to AVDD – 1.85 V. Since the
input range is defined in terms of VREF, this would essentially
increase the range to 0 V to 3 V with an AVDD above 4.85 V.
The AD780 can be selected with a 3 V reference voltage.
The TEMP pin, which measures the temperature of the
AD7653, can be used as shown in Figure 24. The output of the
TEMP pin is applied to one of the inputs of the analog switch
(e.g., ADG779), and the ADC itself is used to measure its own
temperature. This configuration is very useful for improving the
calibration accuracy over the temperature range.
ADG779
AD8021
CC
02966-0-024
ANALOG INPUT
(UNIPOLAR)
AD7653
IN
TEMPERATURE
SENSOR
TEMP
Figure 24. Temperature Sensor Connection Diagram
Power Supply
The AD7653 uses three power supply pins: an analog 5 V
supply AVDD, a digital 5 V core supply DVDD, and a digital
input/output interface supply OVDD. OVDD allows direct
interface with any logic between 2.7 V and DVDD + 0.3 V. To
reduce the supplies needed, the digital core (DVDD) can be
supplied through a simple RC filter from the analog supply, as
shown in Figure 22. The AD7653 is independent of power
supply sequencing once OVDD does not exceed DVDD by
more than 0.3 V, and is thus free of supply voltage induced
latch-up.



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