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ACE24LA02DPTH 数据表(PDF) 4 Page - ACE Technology Co., LTD. |
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ACE24LA02DPTH 数据表(HTML) 4 Page - ACE Technology Co., LTD. |
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4 / 18 page ![]() ACE24LA02.04.08.16A Two-wire Serial EEPROM VER 1.1 4 Pin Descriptions Device/Page Addresses (A2, A1 and A0): The A2, A1 and A0 pins are device address inputs that are hard wire for the ACE24LA02.04.08.16A Eight 2K/4K/8K/16K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). Serial Data (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open- collector devices. Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. Write Protect (WP): The ACE24LA02.04.08.16A has a Write Protect pin that provides hardware data protection. The Write Protect pin allows normal read/write operations when connected to ground (GND). When the Write Protection pin is connected to Vcc, the write protection feature is enabled and operates as shown in the following Table 1. Table1. Write Protect WP Pin Status Part of the Array Protected ACE24LA02.04.08.16A At VCC Full Array At GND Normal Read / Write Operations Memory Organization ACE24LA02A, 2K SERIAL EEPROM: Internally organized with 16 pages of 16 bytes each, the 2K requires an 8- bit data word address for random word addressing. ACE24LA04A, 4K SERIAL EEPROM: Internally organized with 32 pages of 16 bytes each, the 4K requires a 9- bit data word address for random word addressing. ACE24LA08A, 8K SERIAL EEPROM: Internally organized with 64 pages of 16 bytes each, the 8K requires a 10- bit data word address for random word addressing. ACE24LA16A, 16K SERIAL EEPROM: Internally organized with 128 pages of 16 bytes each, the 16K requires an 11-bit data word address for random word addressing. Device Operation Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (see Figure 1). Data changes during SCL high periods will indicate a start or stop condition as defined below. |
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