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MS6712LU 数据表(PDF) 9 Page - MOSA ELECTRONICS |
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MS6712LU 数据表(HTML) 9 Page - MOSA ELECTRONICS |
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9 / 14 page ![]() MOSA MS6712L Low Cost 4 Stereo Inputs / 4-Channel Outputs Audio Processor REV 2 9/14 www.mosanalog.com Interface Protocol The format consists of the following •A START condition •A chip address byte including the MS6712L address. (7bits) •The 8 th bit of the byte must be “0”.(write=0, read=1) •MS6712L must always acknowledge the end of each transmitted byte. •A data sequence (N-bytes + Acknowledge) •A STOP condition SCL SDA 1-7 8 9 1-7 8 9 9 8 1-7 S P ADDRESS R / W -- ACK ACK ACK DATA DATA START CONDITION STOP CONDITION Address Code The chip address of the MS6712L is 88H. 1 0 0 0 0 0 1 0 7 bits address MS6712L address W Data Bytes Description The default states of the chip as the power is on are: the volume is -78.75dB, the stereo 4 is selected, all the speakers are mute and the gains of the input stage, the bass and the treble are 0dB. MSB LSB Function 0 0 B2 B1 B0 A2 A1 A0 Volume Control 1 1 0 B1 B0 A2 A1 A0 Speaker ATT LR 1 1 1 B1 B0 A2 A1 A0 Speaker ATT RR 1 0 0 B1 B0 A2 A1 A0 Speaker ATT LF 1 0 1 B1 B0 A2 A1 A0 Speaker ATT RF 0 1 0 G1 G0 S2 S1 S0 Audio Switch 0 1 1 0 C3 C2 C1 C0 Bass Control 0 1 1 1 C3 C2 C1 C0 Treble Control Where Ax = 1.25dB/step; Bx = 10dB/step; Cx = 2dB/step; Gx = 3.75dB/step |
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