| 制造商 | 部件名 | 数据表 | 功能描述 |
 ON Semiconductor |
74LS10
|
33Kb/2P
|
TRIPLE 3-INPUT NAND GATE
|
 Fairchild Semiconductor |
74LS10
|
46Kb/4P
|
Triple 3-Input NAND Gate
|
 SYC Electronica |
74LS10
|
93Kb/4P
|
Triple 3-Input NAND Gate
|
 Texas Instruments |
74LS109
|
409Kb/12P
|
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
2022
|
 ON Semiconductor |
74LS109A
|
96Kb/4P
|
LOW POWER SCHOTTKY
December, 1999 ??Rev. 6
|
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Total : 91 ( 1/5 Page) |
 Texas Instruments |
74LS109
|
409Kb/12P |
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
2022 |
 ON Semiconductor |
74LS109A
|
96Kb/4P |
LOW POWER SCHOTTKY
December, 1999 ??Rev. 6 |
 Fairchild Semiconductor |
74LS11
|
46Kb/4P |
Triple 3-Input AND Gate
|
 List of Unclassifed Man... |
74LS11
|
56Kb/1P |
TRIPLE 3-INPUT AND GATE
|
 SYC Electronica |
74LS11
|
93Kb/4P |
Triple 3-Input AND Gate
|
 Motorola, Inc |
74LS112
|
147Kb/4P |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
 Texas Instruments |
74LS112
|
300Kb/9P |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
|
 Fairchild Semiconductor |
74LS112
|
52Kb/5P |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
|
 Hitachi Semiconductor |
74LS112
|
76Kb/7P |
Dual J-K Negative-edge-triggered Flip-Flops(with Preset and Clear)
|
 Fairchild Semiconductor |
74LS112A
|
52Kb/5P |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
|
 Motorola, Inc |
74LS112A
|
147Kb/4P |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
 Texas Instruments |
74LS114
|
240Kb/8P |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK
|
 Motorola, Inc |
74LS114A
|
149Kb/4P |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|