| 制造商 | 部件名 | 数据表 | 功能描述 |
Analog Devices |
AD6634BC/PCB
|
925Kb/52P |
80 MSPS, Dual-Channel WCDMA Receive Signal Processor (RSP)
REV.0 |
|
AD6634PCB
|
925Kb/52P |
80 MSPS, Dual-Channel WCDMA Receive Signal Processor (RSP)
REV.0 |
|
AD6634
|
931Kb/52P |
80 MSPS, Dual-Channel WCDMA Receive Signal Processor
REV. 0 |
|
AD6630
|
129Kb/8P |
Differential, Low Noise IF Gain Block with Output Clamping
|
|
AD6630AR
|
129Kb/8P |
Differential, Low Noise IF Gain Block with Output Clamping
|
|
AD6630AR-REEL
|
129Kb/8P |
Differential, Low Noise IF Gain Block with Output Clamping
|
|
AD6630PCB
|
129Kb/8P |
Differential, Low Noise IF Gain Block with Output Clamping
|
|
AD6630R
|
129Kb/8P |
Differential, Low Noise IF Gain Block with Output Clamping
|
|
AD6630R/PCB
|
129Kb/8P |
Differential, Low Noise IF Gain Block with Output Clamping
|
|
AD6630
|
132Kb/8P |
Differential, Low Noise IF Gain Block with Output Clamping
REV. 0 |
|
AD6633
|
89Kb/2P |
Multichannel Digital Upconverter with VersaCREST Crest Reduction Engine
|
|
AD6633
|
95Kb/2P |
Multichannel Digital Upconverter with VersaCREST Crest Reduction Engine
Rev. Sp0 |
|
AD6634
|
925Kb/52P |
80 MSPS, Dual-Channel WCDMA Receive Signal Processor (RSP)
REV.0 |
|
AD6635
|
799Kb/60P |
4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP)
REV.0 |
|
AD6635BB
|
799Kb/60P |
4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP)
REV.0 |
|
AD6635BB/PCB
|
799Kb/60P |
4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP)
REV.0 |
|
AD6635
|
805Kb/60P |
4-Channel, 80 MSPS WCDMA Receive Signal Processor
REV. 0 |
|
AD6636
|
1Mb/72P |
150 MSPS Wideband Digital Down-Converter (DDC)
8/04-Revision 0 |
|
AD6636BBCZ1
|
1Mb/72P |
150 MSPS Wideband Digital Down-Converter (DDC)
8/04-Revision 0 |
|
AD6636BC
|
1Mb/72P |
150 MSPS Wideband Digital Down-Converter (DDC)
8/04-Revision 0 |
Chinese ▼ 
English
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand