| 制造商 | 部件名 | 数据表 | 功能描述 |
 Analog Devices |
ADATE205
|
389Kb/16P |
250 MHz Dual DCL
1/06-Revision 0 |
|
ADATE205BSV
|
389Kb/16P |
250 MHz Dual DCL
1/06-Revision 0 |
|
ADATE205
|
347Kb/16P |
250 MHz Dual DCL
REV. A |
|
ADATE206
|
315Kb/16P |
500 MHz Dual DCL
1/06- Revision 0 |
|
ADATE206BSV
|
315Kb/16P |
500 MHz Dual DCL
1/06- Revision 0 |
|
ADATE206
|
348Kb/16P |
500 MHz Dual DCL
REV. A |
|
ADATE207BBP
|
623Kb/36P |
Quad Pin Timing Formatter
5/07-Revision 0 |
|
ADATE207BBPZ
|
623Kb/36P |
Quad Pin Timing Formatter
5/07-Revision 0 |
|
ADATE207
|
624Kb/36P |
Quad Pin Timing Formatter
REV. 0 |
|
ADATE209
|
829Kb/16P |
4.0 Gbps Dual Driver
REV. 0 |
|
ADATE209
|
876Kb/17P |
4.0 Gbps Dual Driver
2/10-Rev. 0 to Rev. A |
|
ADATE209BBCZ
|
829Kb/16P |
4.0 Gbps Dual Driver
REV. 0 |
|
ADATE209BBCZ
|
876Kb/17P |
4.0 Gbps Dual Driver
2/10-Rev. 0 to Rev. A |
|
ADATE209
|
876Kb/17P |
4.0 Gbps Dual Driver
2/10-Rev. 0 to Rev. A |
|
ADATE302-02
|
1Mb/52P |
500 MHz Dual Integrated DCL with Differential Drive/Receive, Level Setting DACs, and Per Pin PMU
REV. 0 |
|
ADATE302-02
|
1Mb/59P |
500 MHz Dual Integrated DCL
23-Feb-2017 |
|
ADATE302-02
|
1Mb/58P |
00 MHz Dual Integrated DCL with Differential Drive/Receive, Level Setting DACs, and Per Pin PMU
Rev. A |
|
ADATE302-02BBCZ
|
1Mb/52P |
500 MHz Dual Integrated DCL with Differential Drive/Receive, Level Setting DACs, and Per Pin PMU
REV. 0 |
|
ADATE302-02BBCZ
|
1Mb/59P |
500 MHz Dual Integrated DCL
23-Feb-2017 |
|
ADATE302-02BSVZ
|
1Mb/59P |
500 MHz Dual Integrated DCL
23-Feb-2017 |