FEATURES

• Single chip ATM User-Network Interface operating at 155.52 and 51.84 Mbit/s.

• Provides an Analog Edge Interface that can be selected to interface directly with Category-5 Unshielded Twisted Pair (UTP-5) or Shielded Twisted Pair cables, or to interface with Pseudo-ECL (PECL) optical data links (ODLs), using a minimum of passive components.

• Implements the ATM Forum User Network Interface Specification and the ATM physical layer for Broadband ISDN according to CCITT Recommendation I.432.

• Processes duplex 155.52 Mbit/s STS-3c/STM-1 (direct interface to a twisted pair cable or PECL interface to a PMD device) or 51.84 Mbit/s STS-1 (PECL interface to a PMD device only) data streams with on-chip clock and data recovery and clock synthesis.

• Performs clock recovery and clock synthesis using on-chip loop filters.

• Provides Saturn Compliant Interface - PHYsical layer (SCI-PHY™) FIFO buffers in both transmit and receive paths with parity support. Compatible with ATM Forum Utopia Level 1 specification.

• Inserts and extracts the generic flow control (GFC) bits via a simple serial interface and provides a transmit XOFF function to allow for local flow control.

• Provides a generic 8-bit microprocessor bus interface for configuration, control, and status monitoring.

• Low power, +5 Volt, CMOS technology.

• 128 pin high performance plastic quad flat pack (PQFP) 14 mm x 20 mm package.