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PM5381 数据表 (PDF) - PMC-Sierra, Inc

PM5381 Datasheet PDF - PMC-Sierra, Inc
部件名 PM5381
下载  PM5381 下载
文件大小   2489.32 Kbytes
  2 Pages
制造商  PMC [PMC-Sierra, Inc]
网页  http://www.pmc-sierra.com
标志 PMC - PMC-Sierra, Inc
功能描述 SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S

PM5381 Datasheet (PDF)

Go To PDF Page 下载 数据表
PM5381 Datasheet PDF - PMC-Sierra, Inc

部件名 PM5381
下载  PM5381 Click to download

文件大小   2489.32 Kbytes
  2 Pages
制造商  PMC [PMC-Sierra, Inc]
网页  http://www.pmc-sierra.com
标志 PMC - PMC-Sierra, Inc
功能描述 SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S

PM5381 数据表 (HTML) - PMC-Sierra, Inc


PM5381 产品详情

DESCRIPTION
The PM5381 S/UNI-2488 SATURN User Network Interface is a monolithic integrated circuit that implements SONET/SDH processing, ATM mapping and Packet over SONET mapping functions at the STS-48 (STM-16-16c) 2488.32 Mbit/s rate.

FEATURES
General
• Single chip ATM and POS User-Network Interface operating at 2488.32 Mbit/s.
• Implements the ATM Forum User Network Interface Specification and the ATM physical layer for
   Broadband ISDN according to CCITT Recommendation I.432.
• Implements the Point-to-Point Protocol (PPP) over SONET/SDH specification according to RFC
   2615(1619)/1662 of the PPP Working Group of the Internet Engineering Task Force (IETF).
• Processes bit-serial 2488.32 Mbit/s STS-48 (STM-16-16c) data streams with on-chip clock and data
   recovery and clock synthesis.
• Complies with Bellcore GR-253-CORE jitter tolerance, jitter transfer and intrinsic jitter criteria.
• Provides termination for SONET Section, Line and Path overhead or SDH Regenerator Section,
   Multiplexer Section and High Order Path overhead.
• Provides UTOPIA Level 3 32-bit wide System Interface (clocked up to 104 MHz) with parity support
   for ATM applications.
• Provides SATURN POS-PHY Level 3™ 32-bit System Interface (clocked up to 104 MHz) for Packet
   over SONET (POS), or ATM applications.
• Supports line loopback from the line side receive stream to the transmit stream and diagnostic
   loopback from the line side transmit stream to the line side receive stream interface.
• Provides support for automatic protection switching via a 4-bit LVDS 777.76 MHz port.
• Provides a standard 5 signal IEEE 1149.1 JTAG test port for boundary scan board test purposes.
• Provides a generic 16-bit microprocessor bus interface for configuration, control, and status
   monitoring.
• Low power 1.8V CMOS core logic with 3.3V CMOS/TTL compatible digital inputs and digital outputs.
   PECL inputs and outputs are 3.3V compatible.
• Industrial temperature range (-40°C to +85°C).
• 416 pin UBGA package.

APPLICATIONS
• ATM/ Multi-service Enterprise, Access, Edge and Core switches
• Packet Over Sonet interfaces for Access, Edge and Core routers
• SONET/SDH Add/Drop Multiplexers and Terminal Multiplexers with data processing capabilities
• DWDM Optical networking equipment requiring SONET/SDH capabilities
• Network Interface Cards and Uplinks




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