Features
• Board
– Half-bridge configuration
– High-voltage rail up to 520 V (limited by the MOSFET’s and capacitor’s rating)
– SCTH60N120G2-7 SiC MOSFETs: 1200 V, 52 mΩ, 60 A
– Compatible with 5 V and 3.3 V MCUs
– VDD logic supplied by onboard-generated 3.3 V or VAUX = 5 V
– On-board isolated DC-DC converters to supply high-side and low-side gate drivers, fed by VAUX = 5 V, with 5.2 kVpk maximum isolation
– Easy jumper selection of driving voltage configuration: +19/0 V; +19/-4.7 V; +17/0 V; +17/-4.7 V
– Fault LED indicators
– Maximum working voltage across isolation: 1200 V
– RoHS compliant
• STGAP3SXS device
– Driver current capability: 6 A source/sink @ 25 °C
– 75 ns input-output propagation delay
– Miller CLAMP driver for external N-channel MOSFET
– Adjustable soft turn-off function
– UVLO function
– Desaturation protection
– Gate driving voltage up to 32 V
– Negative gate driving voltage
– 3.3 V, 5 V TTL/CMOS inputs with hysteresis
– Temperature shutdown protection
– Reinforced galvanic isolation: Isolation voltage VISO = 5.7 kVRMS (according to UL 1577) Transient overvoltage VIOTM = 8 kVPEAK (according to IEC 60747-17) Max. repetitive isolation voltage VIORM = 1.2 kVPEAK (according to IEC 60747-17)

Description
The EVLSTGAP3S6S is a half-bridge evaluation board designed to evaluate the STGAP3S6S isolated single gate driver.
The STGAP3S6S is characterized by 6 A current capability, rail-to-rail outputs and optimized UVLO and DESAT protection thresholds for SiC MOSFETS, which makes the device optimal for high-power motor drivers in industrial applications.
The gate driver has a single output pin and a driver line for an external Miller CLAMP N-channel MOSFET, which optimizes positive and negative gate spikes suppression during fast commutations in half-bridge topologies.
The board is supplied by the 5 V VAUX connection, which fed the isolated DC-DC converters for the low-side and high-side driving sections. The gate drivers can be directly supplied by VAUX if a 5 V MCU is used, or by the onboard linear regulator if a 3.3 V MCU is used. The PWM and Reset inputs can be easily controlled through dedicated connectors while diagnostic outputs are connected to an onboard LED.
Device protection features (Desaturation, Soft turn-off and Miller clamp) are connected to the recommended network on the board and can be easily evaluated through the board test points.
Dual input pins allow the selection of signal polarity control and implementation of HW interlocking protection to avoid cross-conduction in case of controller malfunction.
The device allows implementing negative gate driving, and the on-board isolated DC-DC converters allow working with optimized driving voltage for SiC MOSFETs.
The EVLSTGAP3S6S board allows evaluating all of the STGAP3S6S features while operating with a bus voltage up to 520 V. It is possible to increase the bus voltage up to 1200 V by replacing the two SiC MOSFETs with appropriate devices in a H2PAK-7 package and the C4 capacitance if needed.