GENERAL DESCRIPTION
The ADF4106 frequency synthesizer can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise, digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, programmable A counter and B counter, and a dual-modulus prescaler (P/P + 1). The A (6-bit) counter and B (13-bit) counter, in conjunction with the dual-modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R Counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). Its very high bandwidth means that frequency doublers can be eliminated in many high frequency systems, simplifying system architecture and reducing cost.

FEATURES
  6.0 GHz bandwidth
  2.7 V to 3.3 V power supply
  Separate charge pump supply (VP) allows extended tuning voltage in 3 V systems
  Programmable dual-modulus prescaler 8/9, 16/17, 32/33, 64/65
  Programmable charge pump currents
  Programmable antibacklash pulse width
  3-wire serial interface
  Analog and digital lock detect
  Hardware and software power-down mode
 
APPLICATIONS
  Broadband wireless access
  Satellite systems
  Instrumentation
  Wireless LANS
  Base stations for wireless radios