DESCRIPTION
Silicon N-channel enhancement mode vertical D-MOS transistor encapsulated in a 4-lead, SOT121B flange package with a ceramic cap. All leads are isolated from the flange. A marking code, showing gate-source voltage (VGs) information is provided for matched pair applications. Refer to the "General" section of the handbook for further information.

FEATURES
• High power gain
• Lownoise figure
• Easy power control
• Good thermal stability
• Withstands full load mismatch.

APPLICATIONS
• Large signal amplifier applications in the VHP frequency range.