AD5273

–16–

100 mA with a 5 V supply. For precision applications, a voltage

reference such as ADR421, ADR03, or ADR370 can be applied

at the A terminal of the digital potentiometer.

Programmable Current Source

A programmable current source can be implemented with the

circuit shown in Figure 15. The load current is simply the voltage

at zero-scale, the A terminal of the AD5273 will be at –2.048 V,

which makes the wiper voltage clamped at ground potential.

Dependent on the load, Equation 5 is therefore valid only at cer-

to full-scale of the AD5273.

GND

2U1

+5V

4

6

3

SLEEP

REF191

C1

1 F

B

A

W

100

–5V

OP1177

+5V

V+

V–

U2

U3

AD5273

Figure 15. Programmable Current Source

I

VD

R

D

L

REF

S

=

¥

££

() / 64

32

63

(5)

Gain Control Compensation

As seen in Figure 16, the digital potentiometers are commonly

used in gain controls or sensor transimpedance amplifier signal

conditioning applications.

U1

C2

4.7pF

R2 A

B

W

100k

C1

R1

47k

Figure 16. Typical Noninverting Gain Amplifier

In both applications, one of the digital potentiometer terminals is

connected to the op amp inverting node with finite terminal capaci-

whereas a typical op amp GBP has –20 dB/dec characteristics. A

large R2 and finite C1 can cause this zero’s frequency to fall well

below the crossover frequency. Thus the rate of closure becomes

40 dB/dec and the system has 0° phase margin at the crossover

frequency. The output may ring or in the worst case oscillate when

the input is a step function. Similarly, it is also likely to ring when

switching between two gain values because this is equivalent to a

step change at the input. To reduce the effect of C1, users should

also configure B or A rather than W terminal at the inverting node.

Depending on the op amp GBP, reducing the feedback resistor may

extend the zero’s frequency far enough to overcome the problem.

A better approach is to include a compensation capacitor C2 to

cancel the effect caused by C1. Optimum compensation occurs

when R1

C1 = R2

C2. This is not an option because of the

variation of R2. As a result, one may use the relationship above

and scale C2 as if R2 is at its maximum value. Doing so may

overcompensate by slowing down the settling time when R2 is

set at low values. As a result, C2 should be found empirically for

a given application. In general, C2 in the range of a few pF to no

more than a few tenths of a pF is adequate for the compensation.

There is also a W terminal capacitance connected to the output

(not shown); its effect on stability is less significant so that the

compensation may not be necessary unless the op amp is driving

a large capacitive load.

Programmable Low-Pass Filter

In A/D conversion applications, it is common to include an anti-

aliasing filter to band-limit the sampling signal.To minimize various

system redesigns, users may use two 1 k

AD5273s to construct a

generic second-order Sallen Key low-pass filter. Since the AD5273

is a single supply device, the input must be dc offset when an ac

signal is applied to avoid clipping at ground. This is illustrated in

Figure 17. The design equations are:

V

V

S

Q

S

O

I

O

O

O

=

++

w

w

w

2

2

2

(6)

w

O

R1R2C1C2

=

1

(7)

Q

R1C1

R2C2

=+

11

(8)

Users can first select some convenient values for the capacitors.

To achieve maximally flat bandwidth where Q = 0.707, let C1 be

twice the size of C2 and let R1 = R2. As a result, R1 and R2 can

be adjusted to the same setting to achieve the desirable bandwidth.

AD8601

+2.5V

U1

–2.5V

V+

V–

C1

C

R1

R2

A

B

W

A

B

W C2

C

ADJUSTED TO

SAME SETTINGS

Figure 17. Sallen Key Low-Pass Filter

Level Shift for Different Voltages Operation

When users need to interface a 2.5 V controller with the AD5273,

a proper voltage level shift must be employed so that the digital

potentiometer can be read from or written to the controller;

Figure 18 shows one of the implementations. M1 and M2 should

be low threshold N-Ch Power MOSFETs such as FDV301N.

REV. 0