AD9874EB datasheet(21/40 Pages) AD

21 / 40 page

REV. 0

AD9874

–21–

–25

–90

–100

–110

–120

–20

–15

–10

–5

CKI = 0

FREQUENCY OFFSET – kHz

–80

–70

–60

–50

–40

–30

–20

–10

CKI = 2

CKI = 6

EXT CLK

CKI = 4

Figure 7c. CLK Phase Noise vs. Charge Pump Setting Bias

(CLK SYN Settings: CKO Bias = 3, CKR = 56, and CKN = 60

with fREF = 100kHz)

Table VIII. SPI Registers Associated with CLK Synthesizer

Address

Bit

Default

(Hex)

Breakdown Width

Value

Name

0x00

(7:0)

0xFF

STBY

0x01

(3:2)

CKOB

0x10

(5:0)

CKR(13:8)

0x11

(7:0)

0x38

CKR(7:0)

0x12

(4:0)

0x00

CKN(12:8)

0x13

(7:0)

0x3C

CKN(7:0)

0x14

(6)

CKF

(5)

CKINV

(4:2)

CKI

(1:0)

CKTM

0x15

(3:0)

0x0

CKFA(13:8)

0x16

(7:0)

0x04

CKFA(7:0)

IF LNA/MIXER

The AD9874 contains a single-ended LNA followed by a Gilbert-

type active mixer, shown in Figure 8 with the required external

components. The LNA uses negative shunt feedback to set its

input impedance at the IFIN Pin, thus making it dependent on the

LNA bias setting and input frequency. It can be modeled as

approximately 370

Ω//1.4 pF ( 20%) for the higher bias settings

below 100 MHz. Figures 9a and 9b show the equivalent input

impedance versus frequency characteristics of the AD9874 with

all the LNA bias settings. The increase in shunt resistance ver-

sus frequency can be attributed to the reduction in bandwidth,

thus the amount of negative feedback of the LNA. Note, the

input signal into IFIN should be ac-coupled via a 10 nF capaci-

tor since the LNA input is self-biasing.

IFIN

RGAIN

RBIAS

VDDI

MXOP

LO INPUT =

0.3V p-p TO

1.0V p-p

DC SERVO

LOOP

MULTI-TANH

V–I STAGE

CXIF

MXON

CXVM

CXVL

2.7V TO 3.6V

Figure 8. Simplified Schematic of AD9874’s LNA/Mixer

FREQUENCY – MHz

500

100

400

600

200

550

450

150

350

300

350

300

250

LNA BIAS = 0

LNA BIAS = 1

LNA BIAS = 2

LNA BIAS = 3

Figure 9a. The Shunt Input Resistance vs. the

Frequency of the AD9874’s IF1 Input

FREQUENCY – MHz

1.5

100

0.5

2.5

200

2.0

1.0

150

350

300

250

LNA BIAS = 3

LNA BIAS = 2

LNA BIAS = 1

LNA BIAS = 0

Figure 9b. The Shunt Capacitance vs.

the Frequency of the AD9874’s IF1 Input

AD9874EB 数据表(PDF) 21 Page - Analog Devices

AD9874EB 数据表(HTML) 21 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

数据表下载

链接网址

AD9874EB 数据表(PDF) 21 Page - Analog Devices

AD9874EB 数据表(HTML) 21 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

数据表 下载

链接网址

数据表下载