35

PC755/745

2138D–HIREL–06/03

Figure 23. JTAG Interface Connection

Notes:

1. RUN/STOP, normally found on pin 5 of the COP header, is not implemented on the PC755. Connect pin 5 of the COP

header to OV

2. Key location; pin 14 is not physically present on the COP header.

3. Component not populated. Populate only if debug tool does not drive QACK.

4. Populate only if debug tool uses an open-drain type output and does not actively deassert QACK.

5. If the JTAG interface is implemented, connect HRESET from the target source to TRST from the COP header though an

AND gate to TRST of the part. If the JTAG interface is not implemented, connect HRESET fromthe target source to TRST of

the part through a 0

Ω isolation resistor.

HRESET

HRESET

From Target

Board Sources

13

SRESET

SRESET

SRESET

NC

NC

11

VDD_SENSE

6

15

2k

Ω

10 k

Ω

10 k

Ω

10 k

Ω

CHKSTP_IN

CHKSTP_IN

8

TMS

TDO

TDI

TCK

TMS

TDO

TDI

TCK

9

1

3

4

TRST

7

16

2

10

12

(if any)

Key

QACK

10 k

Ω

TRST

10 k

Ω

10 k

Ω

10 k

Ω

QACK

QACK

CHKSTP_OUT

CHKSTP_OUT

3

13

9

5

1

6

10

2

15

11

7

16

12

8

4

KEY

No pin

COP Connector

Physical Pin Out

10 k

1

2k

0

HRESET