AL2100

Preliminary Data Sheet

11/11/02

Broa d c om Co rp o r a ti o n

100Base Fiber PHY

Document

AL2100-DS01-405-R

The AL2100 includes a fiber PHY. It can transmit and receive data over fiber-optic cable when paired with an external fiber-

optic line driver and receiver. In FX mode, the receive data stream differential PECL level is sampled from the fiber-optic

receiver. NRZI decoding is used instead of MLT3. Baseline wander, adaptive equalization, and stream cipher descrambler

functions are bypassed.

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The decoded data is driven onto the MII receive data pins. When an invalid code group is detected in the data stream, the

fiber PHY asserts the MII RXER signal. The fiber PHY also asserts RXER for several other error conditions that improperly

terminate the data stream. While RXER is asserted, the receive data pins are driven with 4-bit code, indicating the type of

error detected. The error codes are listed in Table 42 on page 31.

In 100Base-FX mode, the external fiber-optic receiver performs the signal energy detection function, and communicates this

information directly to the SD signal, pin 4.

The digital clock recovery creates all internal transmit and receive clocks. The transmit clock is locked to the 25 Mhz clock

input, while the receive clock is lock to the incoming data stream. The clock recovery circuit optimized to MLT3, NRZI. The

input data stream is sampled by the recovery clock, and fed synchronously to the adaptive equalizer.

Serialized data bypasses the scrambler and 4B/5B encoder in FX mode. The output data is from the NRZI PECL signals.

The PECL level signals are used to drive the fiber-transmitter.

Auto-negotiation provides the mechanism to inform the link partner that a remote fault has occurred. However, auto-

negotiation is disabled in 100Base-FX applications. An alternative in-band signaling function (FEFI) is used to signal a

remote fault condition.

FEFI is a stream of 84 consecutive 1s followed by one logic 0. This pattern is repeated three times.

A FEFI signals only under the following conditions:

•

When no activity is received from the link partner

•

When the clock recovery circuit detects a signal error or PLL lock error

•

When the management entity sets the transmit FEF bit