Preliminary Data Sheet

AL2100

11/11/02

Broa d c om Co rp o r a ti o n

Document

AL2100-DS01-405-R

List of Tables

LIST OF TABLES

Table 1: Pin Descriptions.................................................................................................................................... 2

Table 2: LED Formats ........................................................................................................................................ 9

Table 3: Events for LED Operation................................................................................................................... 10

Table 4: SPD100 0 Settings ............................................................................................................................. 12

Table 5: Registers 0 through 31 ....................................................................................................................... 16

Table 6: Register 0: Control Register Bit Description ....................................................................................... 17

Table 7: Register 1: Status Register Bit Description ........................................................................................ 17

Table 8: Register 2: PHY Identifier 1 Register Bit Description ......................................................................... 18

Table 9: Register 3: PHY Identifier 2 Register Bit Description ......................................................................... 18

Table 10: Register 4: Auto-Negotiation Advertisement Register Bit Description .............................................. 19

Table 11: Register 5: Auto-Negotiation Link Partner Ability Register/Link Partner Next Page Message Bit

Description ....................................................................................................................................... 19

Table 12: Register 6: Auto-Negotiation Expansion Register Bit Description .................................................... 20

Table 13: Register 7: Auto-Negotiation Next Page Transmit Register Bit Description ..................................... 20

Table 14: Register 18: Diagnostic Register Bit Description .............................................................................. 21

Table 15: Register 19: Power/Loopback Register Bit Description .................................................................... 21

Table 16: Register 20: Cable Measurement Capability Register Bit Description ............................................. 21

Table 17: Register 21: Receive Error Counter Bit Description ......................................................................... 22

Table 18: Register 22: Power Management Register Bit Description .............................................................. 22

Table 19: Register 23: Operation Mode Register Bit Description ..................................................................... 23

Table 20: Register 24: CRC for Recent Received Packet Bit Description........................................................ 23

Table 21: 100Base-FX PHY Registers ............................................................................................................. 24

Table 22: Register 0: Control Register Bit Description ..................................................................................... 24

Table 23: Register 1: Status Register Bit Description ...................................................................................... 25

Table 24: Register 2: PHY Identifier 1 Register Bit Description ....................................................................... 25

Table 25: Register 3: PHY Identifier 2 Register Bit Description ....................................................................... 26

Table 26: Register 21: Receive Error Counter Bit Description ......................................................................... 26

Table 27: Register 22: Power Management Register Bit Description .............................................................. 26

Table 28: Register 23: Operation Mode Register Bit Description ..................................................................... 27

Table 29: Register 24: CRC for Recent Received Packet Bit Description........................................................ 27

Table 30: Common Register 0: Mode Control Register (Map to TP_PHY, Reg. 28) Bit Description ............... 27

Table 31: Common Register 4: LED Blink Rate (Map to TP_Phy, Reg. 29, Page 1 a28 [15:12] = 0001) Bit

Description ....................................................................................................................................... 28