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LTC1644IGN 数据表(PDF) 17 Page - Linear Technology |
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LTC1644IGN 数据表(HTML) 17 Page - Linear Technology |
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17 / 24 page ![]() LTC1644 17 1644f Output Voltage Monitor The status of all four output voltages is monitored by the power good function. In addition, the PCI_RST# signal is logically combined on-chip with the HEALTHY# signal to create LOCAL_PCI_RST# (see Table 5). As a result, LOCAL_PCI_RST# will be pulled low whenever HEALTHY# is pulled high independent of the state of the PCI_RST# signal. Table 5. LOCAL_PCI_RST# Truth Table PCI_RST# HEALTHY# LOCAL_PCI_RST# LO LO LO LO HI LO HI LO HI HI HI LO If any of the output voltages drop below the power good threshold for more than 10 µs, the PWRGD pin will be pulled high and the LOCAL_PCI_RST# signal will be asserted low. Precharge The PRECHARGE input and DRIVE output pins are in- tended for use in generating the 1V precharge voltage that is used to bias the bus I/O connector pins during board insertion. The LTC1644 is also capable of generating precharge voltages other than 1V. Figure 8 shows a circuit that can be used in applications requiring a precharge voltage less than 1V. The circuit in Figure 9 can be used for applications that need precharge voltages greater than 1V. Table 6 lists suggested resistor values for R10A and R10B vs precharge voltage for the application circuits shown in Figures 8 and 9. Table 6. R10A and R10B Resistor Values vs Precharge Voltage VPRECHARGE R10A R10B VPRECHARGE R10A R10B 1.5V 18 Ω 9.09 Ω 0.9V 16.2 Ω 1.78 Ω 1.4V 18 Ω 7.15 Ω 0.8V 14.7 Ω 3.65 Ω 1.3V 18 Ω 5.36 Ω 0.7V 12.1 Ω 5.11 Ω 1.2V 18 Ω 3.65 Ω 0.6V 11 Ω 7.15 Ω 1.1V 18 Ω 1.78 Ω 0.5V 9.09 Ω 9.09 Ω 1V 18 Ω 0 Ω Due to leakage current constraints, precharge resistor values of less than 50k are often required. In these precharge applications, it may also be necessary to dis- connect the individual resistors from the LTC1644’s PRECHARGE pin when the plug-in board is completely seated in the board slot. The circuit in Figure 10 uses a bus switch to connect the individual precharge resistors to the LTC1644’s PRECHARGE pin while the BD_SEL# pin volt- age is pulled up to 5VIN, i.e., when the BD_SEL# short connector pin is still unconnected. After the plug-in board is completely seated, the BD_SEL# pin voltage will drop to approximately 3.8V (assuming BD_SEL# isn’t asserted low), and the bus switch OE pin is pulled high by Q2. When the plug-in card is removed from the connector, the BD_SEL# connection is broken first and the BD_SEL# pin voltage pulls up to 5V. This causes Q2 to turn off, which re- enables the bus switch and the precharge resistors are reconnected to the LTC1644’s PRECHARGE pin for the remainder of the board extraction process. Other CompactPCI Applications The LTC1644 can be easily configured for applications where no VEE supply is present by simply connecting the VEEIN pin to GND and floating the VEEOUT pin (Figure 11). For CPCI applications where no 5V supply input is re- quired, short both the 5VIN and 5VSENSE pins to the 3VIN pin and short the 5VOUT pin to the 3VOUT pin (Figure 12). If no 3.3V supply input is required, Figure 13 illustrates how the LTC1644 should be configured. First, 3VSENSE (Pin 16) is connected to 3VIN (Pin 17), 3VOUT (Pin 18) is connected to 5VOUT (Pin 3) and the LTC1644’s 3VIN pin is connected through a pair of signal diodes (BAV99) to 5VIN. For applications where the BD_SEL# connector pin is typically grounded on the backplane, the circuit in Figure 14 allows the LTC1644 to be reset simply by pressing a pushbutton switch on the CPCI plugin board. This arrangement eliminates the requirement to extract and reinsert the CPCI board in order to reset the LTC1644’s circuit breakers. Power MOSFET Selection Criteria Three device parameters are key in selecting the optimal power MOSFET for Hot Swap applications. The three parameters are: (1) device power dissipation (PD); (2) device drain-source channel ON resistance, RDS(ON); and APPLICATIO S I FOR ATIO |
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