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PIP202-12M 数据表(PDF) 4 Page - NXP Semiconductors

部件名 PIP202-12M
功能描述  DC to DC converter powertrain
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

PIP202-12M 数据表(HTML) 4 Page - NXP Semiconductors

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Philips Semiconductors
PIP202-12M
DC to DC converter powertrain
Product data
Rev. 01 — 15 July 2002
4 of 20
9397 750 10031
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
When the input voltage is LOW and current is flowing in the inductor, the upper
MOSFET must be off and the lower MOSFET must be on. Current flows from the
power ground (VSSO), through the lower MOSFET and the inductor (Lout), to the
output.
Finally, when switching between states, both MOSFETs must not be on at the same
time.
7.2 MOSFET driver function
The input, output and gate drive waveforms are shown in Figure 4. When the input
voltage goes HIGH, the gate drive to the lower MOSFET immediately goes LOW. This
causes the output current to flow through the Schottky diode, connected between the
drain and source of the lower MOSFET. This causes output voltage to fall from zero to
approximately
−0.5 V.
After a delay, if the input voltage is still HIGH, the gate drive to the upper MOSFET
goes HIGH. This causes the output voltage to rise to the output stage supply voltage,
VDDO.
When the input voltage goes LOW, the gate drive to the upper MOSFET immediately
goes LOW. The output voltage falls from VDDO, until it is clamped by the Schottky
diode at approximately
−0.5 V.
After a delay, if the input voltage is still LOW, the gate drive to the lower MOSFET
goes HIGH. The lower MOSFET turns on, and the output voltage rises from
−0.5 V to
zero.
7.3 Bootstrap diode
A bootstrap diode is integrated into the design of the PIP202-12M between VDDC
and CB.
Fig 4.
Input, output and gate drive waveforms of a synchronous DC to DC converter
output stage.
input voltage
output voltage
upper MOSFET
gate drive
lower MOSFET
gate drive
03ag35
delay
delay



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