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PIP202-12M 数据表(PDF) 3 Page - NXP Semiconductors |
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PIP202-12M 数据表(HTML) 3 Page - NXP Semiconductors |
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3 / 20 page ![]() Philips Semiconductors PIP202-12M DC to DC converter powertrain Product data Rev. 01 — 15 July 2002 3 of 20 9397 750 10031 © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 6.2 Pin description [1] All pins connected to PAD1 [2] All pins connected to PAD2 [3] All pins connected to PAD3 [4] PAD1, PAD2 and PAD3 are electrical connections and must be soldered to the printed circuit board [5] All n.c. pins should be connected to VSSC. 7. Functional description 7.1 Basic functionality In order to understand the functions performed by the PIP202-12M, consider the requirements of a synchronous DC to DC converter output stage, driven from a PWM controller (Figure 3). When the input voltage is HIGH, the upper MOSFET must be on and the lower MOSFET must be off. Current flows from the supply (VDDO), through the upper MOSFET and the inductor (Lout), to the output. Table 2: Pin description Symbol Pin I/O Description VDDO 1 to 8, 60, 61, 68 [1] [4] - output stage supply voltage VSSC 9, 15, 22 to 24 [2] [4] - control circuit supply ground VO 10, 26, 27, 45 to 59, 62 to 67 [3] [4] O output CB 11, 12 I/O bootstrap capacitor connection VDDC 13, 14 - control circuit supply voltage VI 16, 17 I pulse width modulated input VSSO 28 to 44 − output stage supply ground n.c. 18 to 21, 25 [5] − no internal connection Fig 3. Simplified functional block diagram of a synchronous DC to DC converter output stage. VI VDDC VSSC VO VDDO input voltage from PWM controller control circuit supply (12 V) output stage supply voltage tp tp T T δ = VI VSSO CB 03ad36 output 100 nF Lout Cout signal ground power ground |
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