LP28601-02

Mar.-2017

www.lowpowersemi.com

Page 2 of 12

Preliminary Datasheet

LP28601

Pin Description

Pin

Name

Description

1

VDDP

Internal LDO output. Connect a decoupling 4.7uF capacitor to GNDP.

2

BST

Positive supply for the high side driver. A 0.22µF capacitor should be placed between BST and LX.

3

LX

Switching Node Connection.

4

HDR

High side drive gate.

5

GNDP

Ground for Power section.

6

LDR

Low side drive gate.

7

STAT

8

NTC

Connect a 10K NTC resistor to GNDA, 100uA(constant current source) current output from NTC pin.

9

COMP

Compensation pin, a 2.2nF ceramic capacitor is needed from COMP to GNDA.

10

REG

Input voltage feedback for the input voltage regulation loop. Connect to tap of an external resistor divider

from VBUS to GNDA to program the input voltage regulation. Once the voltage at REG pin drops to the

inner threshold, the charge current is reduced to maintain the input voltage at the regulation value.

11

ILIM

12

ISET

13,29

GNDA

Ground for the analog circuits.

14

FULL

Battery full indication pin, active low.

15

VB

Programmable battery-full voltage. Connect to GND for 4.35V, leave floating to 4.2V, and connect to

VDDA for 4.3V.

16

SYSSEL

Programmable VSYS minimum voltage. Connect to GND for 3V, leave floating to 3.3V, and connect to

VDDA for3.5V.

17

OTG

USB On-The-Go function enable pin, active low. With 1MΩ internal resistor pulls up. When OTG active,

the charge function is disable. This pin must be high voltage to charge the battery.

18

Boost

Boost function enable pin, active high. With 1MΩ internal resistor pulls up.

19

IREF

Current reference generator. A 100k resistor connect to GNDA, internal voltage reference is 1V.

20

VDDA

Power supply for the internal analog circuit.

21,22

VBAT

Battery charger output and battery voltage sense pin. Connect to battery cell.

23,24

VSYS

System voltage output.

25,26

VBUS

USB or adapter input.

27,28

VDC

A capacitor is needed from this pin to GNDP.