SAFC161RI datasheet(13/60 Pages) SIEMENS

13 / 60 page

Semiconductor Group

1998-05-01

C161RI

External Bus Controller

All of the external memory accesses are performed by a particular on-chip External Bus Controller

(EBC). It can be programmed either to Single Chip Mode when no external memory is required, or

to one of four different external memory access modes, which are as follows:

– 16-/18-/20-/23-bit Addresses, 16-bit Data, Demultiplexed

– 16-/18-/20-/23-bit Addresses, 16-bit Data, Multiplexed

– 16-/18-/20-/23-bit Addresses, 8-bit Data, Multiplexed

– 16-/18-/20-/23-bit Addresses, 8-bit Data, Demultiplexed

In the demultiplexed bus modes, addresses are output on PORT1 and data is input/output on

PORT0 or P0L, respectively. In the multiplexed bus modes both addresses and data use PORT0 for

input/output.

Important timing characteristics of the external bus interface (Memory Cycle Time, Memory

Tri-State Time, Length of ALE and Read Write Delay) have been made programmable to allow the

user the adaption of a wide range of different types of memories and external peripherals.

In addition, up to 4 independent address windows may be defined (via register pairs ADDRSELx /

BUSCONx) which allow to access different resources with different bus characteristics. These

address windows are arranged hierarchically where BUSCON4 overrides BUSCON3 and

BUSCON2 overrides BUSCON1. All accesses to locations not covered by these 4 address windows

are controlled by BUSCON0.

Up to 5 external CS signals (4 windows plus default) can be generated in order to save external glue

logic. Access to very slow memories is supported via a particular ‘Ready’ function.

For applications which require less than 8 MBytes of external memory space, this address space

can be restricted to 1 MByte, 256 KByte or to 64 KByte. In this case Port 4 outputs four, two or no

address lines at all. It outputs all 7 address lines, if an address space of 8 MBytes is used.

SAFC161RI 数据表(PDF) 13 Page - Siemens Semiconductor Group