MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER

MP3312 Rev. 1.02

www.MonolithicPower.com

9

1/13/2015

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© 2015 MPS. All Rights Reserved.

OPERATION

The MP3312 employs the fixed switching

frequency,

peak

current

mode

control

architecture and 2 regulated current sinks to

power the LED array. The operation of the

MP3312 can be understood by referring to the

below function block diagram.

System Startup

Either pulling EN or PWM to high enables the

IC operation while pulling EN to GND

for >2.5ms or pulling PWM to GND for >20ms

shuts down the IC.

When enabled, the MP3312 checks the

topology connection first. The MP3312 also

checks other safety limits, including UVLO and

over-temperature protection (OTP). If all the

protections pass, the chip then starts boosting

the step-up converter with an internal soft-start.

It is recommended that the enable signal occurs

after the establishment of the input voltage and

PWM dimming signal during the start-up

sequence to avoid large inrush current.

Switching Operation

At the start of each oscillator cycle the main low

side FET (M1) is turned on through the control

circuitry. To prevent sub-harmonic oscillation at

duty cycle greater than 50 percent, a stabilizing

ramp is added to the output of the current

sense amplifier and the result is fed into the

positive

input

of

the

PWM

generation

comparator. When this voltage equals the

output voltage of the error amplifier the main

power FET is turned off. Then the inductor

current flows through the free-wheeling diode,

which forces the inductor current to decrease.

The output voltage of the internal error amplifier

is an amplified signal of the difference between

the reference voltage and the feedback voltage.

The converter automatically chooses the lowest

active LEDX pin voltage to provide a high-

enough bus voltage to power all the LED arrays.

If the feedback voltage drops below the

reference, the output of the error amplifier

increases. It results in more current flowing

through the MOSFET, thus increasing the

power delivered to the output. This forms a

closed loop that regulates the output voltage.

Dimming Control

MP3312 supports analog dimming and 1-wire

digital set dimming mode to regulate the WLED

current.

To do analog dimming, apply a PWM signal to

PWM pin by adjusting the LED current

amplitude. The internal filter is integrated and

the PWM signal with 5k~100kHz range is

supported.

Internal

dimming

signal

duty

detection circuit automatically changes the

internal reference lineally to regulate the current.

In addition, the EN pin supports 1-wire interface

to do current dimming control. The 1-wire

description and protocol details are as follow.

1-wire Interface

1-wire interface is based on master-slave

structure which is designed for digital dimming.

The EN pin is multipurpose as single port to

receive LED brightness data. The rate to detect

the

bit

can

automatically

range

from

1.39kBit/sec to 50kBit/sec.

The command sent to chip (slave) contains 24

bits, 9-bit dimming data, 8-bit device address

and RFA bit are included. Chip detects the bit in

series and it transmits the LSB first and MSB

finally.

The control bits description is as below and

Figure 2 shows the command bytes structure in

detail.

• D0-D8 are the dimming data bits which

achieve 9-bit dimming resolution

• Bit9 and bit11-bit15 is reserved. Set to 0

• RFA bit indicates master needs Request of

Acknowledge or not.

• Device address byte is DA0-DA7. The

device address byte is set to 0x8F.