MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER

MP3312 Rev. 1.02

www.MonolithicPower.com

10

1/13/2015

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Figure 2—1-wire command structure

1-wire interface defines logic 0 and logic 1 by

comparing the time of the signal low level and

high level, 1 cycle means 1 logic bit. The bit

detection starts with a falling edge on the EN

pin and ends with the next falling edge. Shown

as Figure 3

Figure 3—1-Wire Bit Definition

The EN pin needs to distinguish EN signal and

digital dimming signal when set up boost driver.

Chip only receives 1-wire signal when EN pin

signal matches 1-wire protocol during 1ms 1-

wire

detection

window.

1-wire

dimming

sequence is described as below, and shown in

Figure 4.

1. Pulling VIN and PWM to high.

wire detection delay time, 100us) and this

rising edge is the start of 1-wire detection

window.

3. After 1-wire detection delay time, pulling data

detection time, 260us). Then pulling data

line to high.

4. The sum of 1-wire detection delay time and

(The time of 1-wire detection window,1ms).

Figure 4—1-Wire Dimming Sequence