MP3331-2A SYNCHRONOUS BOOST FLASH LED DRIVER WITH I

MP3331 Rev. 1.02

www.MonolithicPower.com

18

5/3/2016

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Table 2: Mode Setting Register

Addr: 0x01

Bit

Bit Name

Access

Default

Description

7

STR_LV

RW

1

Flash mode trigger mode with STR signal.

0 = edge sensitive; 1 = level sensitive.

6

STR_MOD

RW

1

STR enable bit.

0 = software enable; 1 = hardware enable.

5

STR_POL

RW

1

STR signal input active polarity.

0 = active low; 1 = active high.

4

LED_EN

RW

0

LED current source enable bit.

0 = LED current sink disable; 1 = enable

3

TX_TOR

RW

0

TX mode or torch mode selection bit;

0 indicates TX/TOR used for TX signal;

1 indicates TX/TOR used for torch signal. In flash mode,

TX/TOR is forced to be used as a TX signal pin regardless

of what this bit is.

2:1

LED_MOD

RW

00

Device mode setting bits.

00 = standby/torch mode; 01 = indicator mode;

10 = assist light mode;

11 = flash mode.

0

5V_MOD

RW

0

5V DC output enable bit.

0 = disable; 1 = enable.

Table 3: Peak Current Setting Register

Addr: 0x02

Bit

Bit Name

Access

Default

Description

7:5

NA

RW

000

Reserved.

4:3

IL_PEAK

RW

01

Inductor current limit setting bits.

00 = 1.9A, 01 = 2.8A,10 = 3.6A,11 = 4.2A

2

FS_SD

RW

0

Disable switching frequency stretching down from 1MHz if

VIN voltage is close to VOUT voltage.

0 = Enable Fs stretching down function.

1 = Disable Fs stretching down function.

0:1

NA

RW

NA

Reserved.