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MP3378 数据表(PDF) 18 Page - Monolithic Power Systems |
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MP3378 数据表(HTML) 18 Page - Monolithic Power Systems |
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18 / 25 page ![]() MP3378 – 4-CHANNEL WLED CONTROLLER PLUS BUCK CONVERTER MP3378 Rev. 1.01 www.MonolithicPower.com 18 5/26/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. Selecting the Power MOSFET The critical parameters for the selection of a MOSFET are as follows: 1. Maximum drain-to-source voltage, VDS(MAX) 2. Maximum current, ID(MAX) 3. On-resistance, RDS(ON) 4. Gate-source charge (QGS) and gate-drain charge (QGD) 5. Total gate charge, QG Ideally, the off-state voltage across the MOSFET is equal to the output voltage. Considering the voltage spike when it turns off, VDS(MAX) should be greater than 1.5 times the output voltage. The maximum current through the power MOSFET occurs at the minimum input voltage and the maximum output power. The maximum RMS current through the MOSFET is given by Equation (5): RMS(MAX) IN1(MAX) MAX I I D , where: OUT1 IN1(MIN) MAX OUT1 VV D V (5) The current rating of the MOSFET should be greater than 1.5 x IRMS. The on resistance of the MOSFET determines the conduction loss, which is given by Equation (6): k R I P (on) DS 2 RMS cond (6) Where k is the temperature coefficient of the MOSFET. The switching loss is related to QGD and QGS1, which determine the commutation time. QGS1 is the charge between the threshold voltage and the plateau voltage when a driver charges the gate (see the chart of VGS vs. QG of the MOSFET datasheet). QGD is the charge during the plateau voltage. These two parameters are needed to estimate turn-on and turn-off losses. See Equation (7): SW1 IN1 DS PLT DR GD SW1 IN1 DS TH DR G GS1 I V V V R Q I V V V R Q f f P G SW (7) Where VTH is the threshold voltage, VPLT is the plateau voltage, RG is the gate resistance, and VDS is the drain-source voltage. Please note that calculating the switching loss is the most difficult part in the loss estimation. Equation (7) provides a simplified equation. For more accurate estimates, the equation becomes much more complex.The total gate charge (QG) is used to calculate the gate drive loss. See Equation (8) DR G DR SW1 P Q V f (8) Where VDR is the drive voltage. Selecting the Output Capacitor The output capacitor keeps the output voltage ripple small and ensures feedback loop stability. The output capacitor impedance must be low at the switching frequency. Ceramic capacitors with X7R dielectrics are recommended for their low ESR characteristics. For most applications, a 4.7 μF ceramic capacitor in parallel with a 22 μF electrolytic capacitor will suffice. Setting the Over-Voltage Protection Open-string protection detects the voltage on OVP. In some cases, an LED string failure results in the feedback voltage equaling zero. The part then keeps boosting the output voltage higher and higher. If the output voltage reaches the programmed OVP threshold, the protection is triggered. To ensure the chip functions properly, select resistor values for the OVP resistor divider to provide an appropriate set voltage. The recommended OVP point is about 1.1 to 1.2 times higher than the output voltage for normal operation. See Equation (9): HIGH OVP LOW R V 1.23 (1 ) R (9) Selecting Dimming Control Mode Two different dimming methods are provided: 1. Direct PWM Dimming An external PWM dimming signal is employed to achieve PWM dimming control. Apply a PWM dimming signal (in the range of 100 Hz to 20 kHz) to PWM. The minimum recommended amplitude of the PWM signal is 1.5 V, and the low-level amplitude should be less than 0.4 V (see Table 1). |
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