LTM8021 datasheet(20/28 Pages) LINER

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LTM8053

8053fc

For more information www.linear.com/LTM8053

APPLICATIONS INFORMATION

Shorted Input Protection

Care needs to be taken in systems where the output is held

high when the input to the LTM8053 is absent. This may

occur in battery charging applications or in battery backup

systemswhereabatteryorsomeothersupplyisdiodeOR-

ed with the LTM8053’s output. If the VIN pin is allowed to

float and the RUN pin is held high (either by a logic signal

or because it is tied to VIN), then the LTM8053’s internal

circuitry pulls its quiescent current through its internal

power switch. This is fine if your system can tolerate a

few milliamps in this state. If you ground the RUN pin, the

internal current drops to essentially zero. However, if the

VIN pin is grounded while the output is held high, parasitic

diodes inside the LTM8053 can pull large currents from

the output through the VIN pin. Figure 2 shows a circuit

that runs only when the input voltage is present and that

protects against a shorted or reversed input.

operation with a haphazard or poor layout. See Figure 3

for a suggested layout. Ensure that the grounding and

heat sinking are acceptable.

A few rules to keep in mind are:

1. Place CFF, CSHARE, RFB and RT as close as possible to

their respective pins.

2. Place the CIN capacitor as close as possible to the VIN

and GND connection of the LTM8053.

3. Place the COUT capacitor as close as possible to the

VOUT and GND connection of the LTM8053.

4. Place the CIN and COUT capacitors such that their

ground current flow directly adjacent to or underneath

the LTM8053.

5. Connect all of the GND connections to as large a copper

pour or plane area as possible on the top layer. Avoid

breaking the ground connection between the external

components and the LTM8053.

6. Use vias to connect the GND copper area to the board’s

internal ground planes. Liberally distribute these GND

vias to provide both a good ground connection and

thermal path to the internal planes of the printed circuit

board. Pay attention to the location and density of the

thermal vias in Figure 3. The LTM8053 can benefit from

theheat-sinkingaffordedbyviasthatconnecttointernal

GND planes at these locations, due to their proximity

to internal power handling components. The optimum

number of thermal vias depends upon the printed

circuit board design. For example, a board might use

very small via holes. It should employ more thermal

vias than a board that uses larger holes.

Figure 2. The Input Diode Prevents a Shorted Input from

Discharging a Backup Battery Tied to the Output. It Also Protects

the Circuit from a Reversed Input. The LTM8053 Runs Only

When the Input Is Present.

PCB Layout

Most of the headaches associated with PCB layout have

been alleviated or even eliminated by the high level of

integration of the LTM8053. The LTM8053 is neverthe-

less a switching power supply, and care must be taken to

minimize EMI and ensure proper operation. Even with the

high level of integration, you may fail to achieve specified

LTM8053

VIN

8053 F02

RUN

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