LTM8021 datasheet(21/28 Pages) LINER

21 / 28 page

LTM8053

8053fc

For more information www.linear.com/LTM8053

SYNC

GND

GND/THERMAL VIAS

RUN

VIN

CIN

BIAS AUX

RFB

COUT

VOUT

RT TR/SS

8053 F03

APPLICATIONS INFORMATION

Hot-Plugging Safely

The small size, robustness and low impedance of ceramic

capacitors make them an attractive option for the input

bypass capacitor of LTM8053. However, these capacitors

can cause problems if the LTM8053 is plugged into a live

supply (see Linear Technology Application Note 88 for a

complete discussion). The low loss ceramic capacitor

combined with stray inductance in series with the power

source forms an underdamped tank circuit, and the volt-

age at the VIN pin of the LTM8053 can ring to more than

twice the nominal input voltage, possibly exceeding the

LTM8053’sratinganddamagingthepart.Iftheinputsupply

is poorly controlled or the LTM8053 is hot-plugged into an

energized supply, the input network should be designed

to prevent this overshoot. This can be accomplished by

installing a small resistor in series to VIN, but the most

popular method of controlling input voltage overshoot is

add an electrolytic bulk cap to the VIN net. This capaci-

tor’s relatively high equivalent series resistance damps

the circuit and eliminates the voltage overshoot. The extra

capacitor improves low frequency ripple filtering and can

slightly improve the efficiency of the circuit, though it is

likely to be the largest component in the circuit.

Thermal Considerations

The LTM8053 output current may need to be derated if it

is required to operate in a high ambient temperature. The

amount of current derating is dependent upon the input

voltage, output power and ambient temperature. The

derating curves given in the Typical Performance Char-

acteristics section can be used as a guide. These curves

were generated by the LTM8053 mounted to a 58cm2

4-layer FR4 printed circuit board. Boards of other sizes

and layer count can exhibit different thermal behavior, so

it is incumbent upon the user to verify proper operation

over the intended system’s line, load and environmental

operating conditions.

For increased accuracy and fidelity to the actual applica-

tion, many designers use FEA (finite element analysis) to

predict thermal performance. To that end, Page 2 of the

data sheet typically gives four thermal coefficients:

θJA – Thermal resistance from junction to ambient

θJCbottom–Thermalresistancefromjunctiontothebottom

of the product case

θJCtop – Thermal resistance from junction to top of the

product case

θJB – Thermal resistance from junction to the printed

circuit board.

While the meaning of each of these coefficients may seem

to be intuitive, JEDEC has defined each to avoid confusion

and inconsistency. These definitions are given in JESD

51-12, and are quoted or paraphrased below:

θJA is the natural convection junction-to-ambient air

thermal resistance measured in a one cubic foot sealed

Figure 3. Layout Showing Suggested External Components, GND

Plane and Thermal Vias

LTM8021 数据表(PDF) 21 Page - Linear Technology

LTM8021 数据表(HTML) 21 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

数据表下载