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LTC6945 数据表(PDF) 21 Page - Linear Technology

部件名 LTC6945
功能描述  16-Bit, 20Msps Serial Low Noise Dual ADC
PDF  24 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTC6945 数据表(HTML) 21 Page - Linear Technology

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21
2271f
LTC2271
APPLICATIONS INFORMATION
GROUNDING AND BYPASSING
The LTC2271 require a printed circuit board with a clean
unbroken ground plane. A multilayer board with an in-
ternal ground plane in the first layer beneath the ADC is
recommended. Layout for the printed circuit board should
ensure that digital and analog signal lines are separated as
much as possible. In particular, care should be taken not
to run any digital track alongside an analog signal track
or underneath the ADC.
High quality ceramic bypass capacitors should be used at
the VDD, OVDD, VCM, VREF, REFH and REFL pins. Bypass
capacitors must be located as close to the pins as possible.
Size 0402 ceramic capacitors are recommended. The traces
connecting the pins and bypass capacitors must be kept
short and should be made as wide as possible.
Of particular importance is the capacitor between REFH
and REFL. This capacitor should be on the same side of
the circuit board as the A/D, and as close to the device
as possible.
The analog inputs, encode signals, and digital outputs
should not be routed next to each other. Ground fill and
grounded vias should be used as barriers to isolate these
signals from each other.
HEAT TRANSFER
Most of the heat generated by the LTC2271 is transferred
from the die through the bottom-side exposed pad and
package leads onto the printed circuit board. For good
electrical and thermal performance, the exposed pad must
be soldered to a large grounded pad on the PC board. This
pad should be connected to the internal ground planes by
an array of vias.
TYPICAL APPLICATIONS
LTC2271
VCM1
GND
AIN1+
AIN1–
GND
REFH
REFL
REFH
REFL
PAR/SER
AIN2+
AIN2–
GND
VCM2
OUT1C+
OUT1C
OUT1D+
OUT1D
DCO+
DCO
OVDD
OGND
FR+
FR–
OUT2A+
OUT2A
OUT2B+
OUT2B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
40
39
38
37
36
35
34
33
32
31
30
29
28
27
+
+
CN1
C3
1μF
C29
1μF
C4
2.2μF
C2
1μF
C16 0.1μF
2271 TA02
OVDD
DIGITAL
OUTPUTS
C37
1μF
C7
0.1μF
C5
0.1μF
VDD
SENSE
SDO
VDD
ENCODE
INPUT
SPI
PORT
PAR/SER
AIN1+
AIN1–
AIN2+
AIN2–
CN1: 2.2μF LOW INDUCTANCE
INTERDIGITATED CAPACITOR
TDK CLLE1AX7S0G225M
MURATA LLA219C70G225M
AVX W2L14Z225M
OR EQUIVALENT



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