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MTC20154

Reset Function

The MTC20154 is placed in reset mode when the RESETN pin is pulled to ground (active low signal). The

system specifications are requiring different behavior of the MTC20154 under reset mode according to the

fact that the MTC20154 is used at the LT or the NT side. The chip status is depicted in the following table:

Table 24. Reset Function (N.B. The reset signal is dominant over the powerdown signal.)

Reset LT side

CLKM pin is replicating the XTALO input clock

(no crystal used at LT side). System clock available

CLKWD is not generated. The pin stays at high level.

Digital blocks are in reset: no activity

Analog blocks are in powerdown

External driver is forced to powerdown

Reset NT side

Crystal driver in power down: no CLKM signal available.

No system clock avail-able.

CLKWD is not generated. The pin stays at high level

Digital blocks are in reset: no activity

Analog blocks are in powerdown

External driver is forced to powerdown