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L8202

3

SERIAL INTERFACE

L8202 Analog ASIC integrates an SPI interface (write only) for data exchange with the Digital ASIC.

The Input word is 19 bits long.

3 Input Pins are dedicated to the Serial Interface: nCS (Chip Select, active Low), SDI (Serial Data In),

SCLK (Serial Clock). nCS must be pulled low to activate a Serial Input command.

Data present at the SDI pin are shifted into the L8202 on the 19 rising edges of SCLK.

The first bit present at the SDI, after the nCS is pulled low, and shifted into the L8202 at the first SCLK

rising edge is the LSB. ( SDI will remain at the value presented with the last bit of data ). The low to high

transition of nCS, after the 19th Sclk rising edge, loads the data into the internal L8202 ASIC input register.

The serial interface is cleared by nRESET.

Figure 4. SPI Operation

Table 5. SPI Timing specifications

Symbol

Parameter

Min.

Typ.

Max.

Unit

Fck

Serial clock frequency

6

8

12

MHz

Tckhw

SCLK high width

30

ns

Tcklw

SCLK low width

30

ns

Tdelay_cs-sck

Delay nCS falling to first SCLK rising

10

ns

Tdelay_sck-cs

Delay last SCLK rising edge to nCS rising

10

ns

Tdata_setup

Data valid to SCLK set up time

10

ns

Tdata_hold

Data hold time

10

ns

Tdelay_cs

Delay required from (n-1)CS to nCS

10

ns

Tr_data

SDI rise time

0

20

ns

Tf_data

SDI fall time

0

20

ns

Tr/f_sck

SCLK rise/fall time

0

20

ns

nCS

SDI

LSB

MSB

7

Tdelay cs_sck

2

3

4

5

6

17

18

1

0

Tdelay sck_cs