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ADL5304ACPZ-R7 数据表(PDF) 4 Page - Analog Devices

部件名 ADL5304ACPZ-R7
功能描述  High Speed, 200 dB Range, Logarithmic Converter
PDF  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADL5304ACPZ-R7 数据表(HTML) 4 Page - Analog Devices

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ADL5304
Data Sheet
Rev. A | Page 4 of 32
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
POWER SUPPLY
VPOS, VNEG
VPOS
4.5
5.0
5.5
V
Quiescent Current
INUM = IDEN = 10 µA; VPOS = 5 V, VNEG = 0 V
13.5
16
mA
4.5 V ≤ VPOS ≤ 5.5 V
10
17
mA
VNEG6
Nominal 0 V for single supply
0
−5
V
Quiescent Current
INUM = IDEN = 10 µA; VPOS = 5 V, VNEG = 0 V
−8.5
−7.3
mA
VNEG = −5 V
−10.5
−6
mA
1
Slope is of the same magnitude but opposite sign for input applied to IDEN.
2
IZ = IREF/10(VOFS/VY). Note that the error of IZ is dependent on three parameters, IREF, VOFS, and VY. All three of those are trimmed.
3
Output noise and small signal bandwidth are functions of input current; measured from the INUM input to the VLOG output. See the Typical Performance
Characteristics section.
4
High-to-low currents (falling edge) represent the worst-case settling condition. Low-to-high currents (rising edge) settling times are approximately 2× faster than the
falling edge settling. Settling time is measured to 1 dB error (10 mV/dB; VLOG settles to within 10 mV of the final value).
5
IREF applied to IDEN together with 1P5V determines the logarithmic intercept current, IZ, and thereby the accuracy of the intercept.
6
Using dual-supply operation with the VSMx, DCBI, and INPS pins at ground, VNEG needs to be in the −2 V to −5 V range for proper device function.



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