数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADA4310-1ACPZ-R2 数据表(PDF) 11 Page - Analog Devices

部件名 ADA4310-1ACPZ-R2
功能描述  Low Cost, Dual, High Current Output Line Driver with Shutdown
PDF  14 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADA4310-1ACPZ-R2 数据表(HTML) 11 Page - Analog Devices

Back Button ADA4310-1ACPZ-R2 Datasheet HTML 6Page - Analog Devices ADA4310-1ACPZ-R2 Datasheet HTML 7Page - Analog Devices ADA4310-1ACPZ-R2 Datasheet HTML 8Page - Analog Devices ADA4310-1ACPZ-R2 Datasheet HTML 9Page - Analog Devices ADA4310-1ACPZ-R2 Datasheet HTML 10Page - Analog Devices ADA4310-1ACPZ-R2 Datasheet HTML 11Page - Analog Devices ADA4310-1ACPZ-R2 Datasheet HTML 12Page - Analog Devices ADA4310-1ACPZ-R2 Datasheet HTML 13Page - Analog Devices ADA4310-1ACPZ-R2 Datasheet HTML 14Page - Analog Devices  
Zoom Inzoom in Zoom Outzoom out
 11 / 14 page
background image
Data Sheet
ADA4310-1
Rev. C | Page 11 of 14
APPLICATIONS INFORMATION
FEEDBACK RESISTOR SELECTION
The feedback resistor has a direct impact on the closed-loop
bandwidth and stability of the current feedback op amp.
Reducing the resistance below the recommended value can
make the amplifier response peak and even become unstable.
Increasing the size of the feedback resistor beyond the recom-
mended value reduces the closed-loop bandwidth. Table 6
provides a convenient reference for quickly determining the
feedback and gain resistor values, and the corresponding
bandwidth, for common gain configurations. The recommended
value of feedback resistor for the ADA4310-1 is 499 Ω.
Table 6. Recommended Values and Frequency Performance1
Gain
RF (Ω)
RG (Ω)
−3 dB SS BW (MHz)
+2
499
499
230
+5
499
124
190
+5
1k
249
125
+10
499
55.4
160
+20
499
26.1
115
1
Conditions: VS = ±6 V, TA = 25°C, RL = 50 Ω, PD1, PD0 = 0,0.
POWER CONTROL MODES OF OPERATION
The ADA4310-1 features four power modes: full power, ¾
power, ½ power, and shutdown. The power modes are
controlled by two logic pins, PD0 and PD1. The power-down
control pins are compatible with standard 3 V and 5 V CMOS
logic. Table 7 shows the various power modes and associated
logic states. In the power-down mode, the output of the
amplifier goes into a high-impedance state.
Table 7. Power Modes
PD1
PD0
Power Mode
Total Supply
Current (mA)
Output
Impedance
Low
Low
Full Power
15.2
Low
Low
High
¾ Power
11.2
Low
High
Low
½ Power
7.8
Low
High
High
Power Down
1.3
High
EXPOSED THERMAL PAD CONNECTIONS
The exposed thermal pad on the 10-lead MSOP package is both
the reference for the PD pins and the only electrical connection
for the negative supply voltage. Therefore, in the 10-lead MSOP
package, the ADA4310-1 can only be used on a single supply.
The exposed thermal pad MUST be connected to ground.
Failure to do so will render the part inoperable.
The 4 mm × 4 mm 16-lead LFCSP package has dedicated pins
for both the positive and negative supplies, and it can be used
in either single supply or dual supply applications. There is no
electrical connection for the exposed thermal pad. Although the
pad could theoretically be connected to any potential, it is still
typically connected to ground.
A requirement for both packages is that the thermal pad be
connected to a solid plane with low thermal resistance, ensuring
adequate heat transfer away from the die and into the board.
POWER LINE APPLICATION
Applications (that is, powerline AV modems) requiring greater
than 10 dBm peak power should consider using an external line
driver, such as the ADA4310-1. Figure 21 shows an example
interface between the TxDAC® output and ADA4310-1 biased
for single-supply operation. The TxDAC’s peak-to-peak differ-
ential output voltage swing should be limited to 2 V p-p, with
the ADA4310-1s gain configured to realize the additional
voltage gain required by the application. A low-pass filter
should be considered to filter the DAC images inherent in the
signal reconstruction process. In addition, dc blocking capacitors
are required to level-shift the TxDAC’s output signal to the
common-mode level of the ADA4310-1 (that is, AVDD/2).
0.1µF
RSET
IOUTP+
IOUTP–
0dB TO –7.5dB
OPTIONAL
LCLPF
AVDD/2
ADA4310-1
ADA4310-1
1/2
1/2
TxDAC
Figure 21. TxDAC Output Directly via Center-Tap Transformer



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com