AD8264

Data Sheet

Rev. B | Page 30 of 40

APPLICATIONS INFORMATION

A LOW CHANNEL COUNT APPLICATION CONCEPT

USING A DISCRETE REFERENCE

The AD8264 is particularly well suited for use in the analog

front end of medical PET imaging systems. Figure 112 shows

how to use the AD8264 with the AD5314 (a 4-channel, 10-bit

DAC) and the AD9222/AD9228 (an octal or quad, 12-bit ADC,

respectively). The DAC sets the gain of the AD8264. Note that the

full gain span of 24 dB is achieved with this setup because the gain

control input range of the AD8264 is very close to 1.25 V. The

GNLO pin must offset by 1.25/2 = 625 mV because the gain

control input is bipolar around the voltage applied at GNLO. This

is done with two 1 kΩ, 1% resistors. The approximately 1 μA of

bias current flowing from the GNLO pin does not contribute a

significant error because the basic gain error of the AD8264 is

the limiting factor.

The ADR127 1.25 V precision reference with an input of 3.3 V

can supply −2 mA to +5 mA from −40°C to +125°C, which is

sufficient to drive both the resistive divider and the REFIN pin

of the AD5314. The AD5314 is based on the string DAC concept,

which means that the REFIN pin looks like a resistor that is

nominally 45 kΩ; this results in a current draw of 1.25 V/45 kΩ =

28 μA. Even at the lowest specified resistance of 37 kΩ, this is

still only a current of 34 μA. Therefore, the total current draw from

the ADR127 is the 625 μA of the resistive divider plus ~30 μA,

which equals ~655 μA, well below the 5 mA maximum current.

Figure 112 also includes the DAC output equation, which

indicates that the output can vary between 0 V and VREF = 1.25 V.

The output of the AD8264 is ideal to drive an ADC like the 1.8 V

quad-channel AD9228. If eight channels are needed, two AD8264s

with the octal AD9222 ADC achieve the same thing. The same

resistive divider can be used for two AD8264s because the bias

current flowing is now ~2 μA, but this still only introduces an

error of 1 mV with ideally matched resistors. With 20 dB/V gain

scaling, this is a gain error of only 0.02 dB, which is much

smaller than the fundamental gain error of the AD8264

(typically ~0.2 dB).

The single-ended-to-differential amplifier of the AD8264

amplifies the VGA output signal by 6 dB and can provide the

required dc bias of the AD9222/AD9228, as shown in Figure 112.

The ADC is connected with the default internal reference because

the SENSE pin is grounded. With this connection, the AD9222/

AD9228 VREF pin is an output that provides 1 V; this is then

connected to the VOCM input of the AD8264, which sets the

output common-mode voltage of the VOHx and VOLx pins to

1 V. This voltage is very close to the recommended optimal value of

VDD/2 = 0.9 V. With this configuration, the ADC inputs are set

to a full-scale (FS) of 2 V p-p.

Note that it is not recommended for the ADC VREF to drive many

loads; therefore, for multiple AD8264s, buffer the VREF.

+3.3V

–3.3V

0.1µF

NC 6

NC 5

1

2

3

NC

GND

ADR127

REFIN

DAC

AD5314

GND

=

10µF

10µF

1kΩ

1%

1kΩ

1%

1.25V

625mV

GNH1

GNH2

GNH3

GNH4

AD8264

GNLO

EACH

VOCM

VOHx VOLx

ADC

AD9222/

AD9228

VREF

VDD

+1.8V

SENSE

GND

SENSE GROUNDED: VREF = 1V

VNEG

VPOS

IPPx

OFSx

~250nA EACH

VGAx

VGA OUTPUTS TO OTHER

SIGNAL PROCESSING

OUTPUT COMMON-MODE VOLTAGE = 1V

VOHx = 1V, VOLx = 1V; VOFS = 0V

FS = 2V p-p

1µF

0.1µF

0.1µF

+3.3V

+3.3V

Figure 112. Application Concept of the AD8264 with the AD5314 10-Bit DAC and the AD9222/AD9228 12-Bit ADC