AD8336ACPZ-R7 datasheet(23/27 Pages) AD

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Data Sheet

AD8336

Rev. F | Page 23 of 27

Circuit Configuration for Inverting Gain

The preamplifier can also be used in an inverting configuration,

as shown in Figure 81.

PRAO

34dB

AD8336

PREAMPLIFIER

INPP

–

GAIN = 9.6dB INPN

RFB1

100Ω

RFB2

301Ω

VPOS

VNEG

VOUT

+5V

–5V

PWRA

VGAI

VCOM

–60dB TO 0dB

Figure 81. Circuit Configuration for Inverting Gain

The considerations regarding total resistance vs. distortion, noise,

and power that were noted in the noninverting case also apply

in the inverting case, except that the amplifier can be operated

at unity inverting gain. The signal gain is reduced while the

noise gain is the same as for the noninverting configuration:

FB1

FB2

Gain

Signal



and





FB1

FB2

Gain

Noise

USING THE POWER ADJUST FEATURE

The AD8336 has the provision to operate at lower power with a

trade-off in bandwidth. The power reduction applies to the

preamplifier and the VGA sections, and the bandwidth is reduced

equally between them. Reducing the power is particularly useful

when operating with higher supply voltages and lower values of

output loading that otherwise stresses the output amplifiers. When

Pin PWRA is grounded, the amplifiers operate in their default

mode, and the combined 3 dB bandwidth is 80 MHz with the

preamplifier gain adjusted to 4×. When the voltage on Pin PWRA

is between 1.2 V and 5 V, the power is reduced by approximately

half and the 3 dB bandwidth reduces to approximately 35 MHz.

The voltage at Pin PWRA must not exceed 5 V.

DRIVING CAPACITIVE LOADS

The output stages of the AD8336 are stable with capacitive loads

up to 47 pF for a supply voltage of ±3 V and with capacitive loads

up to 10 pF for supply voltages up to ±8 V. For larger combined

values of load capacitance and/or supply voltage, a 20 Ω series

resistor is recommended for stability.

The influence of capacitance and supply voltage are shown in

Figure 50 and Figure 51, where representative combinations of

load capacitance and supply voltage requiring a 20 Ω resistor

are marked with an asterisk. No resistor is required for the ±3 V

plots in Figure 49, but a resistor is required for most of the ±12 V

plots in Figure 51.

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