| 数据搜索系统,热门电子元器件搜索 |
|
AD8336ACPZ-R7 数据表(PDF) 24 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD8336ACPZ-R7 数据表(HTML) 24 Page - Analog Devices |
|
24 / 27 page ![]() AD8336 Data Sheet Rev. F | Page 24 of 27 EVALUATION BOARD An evaluation board, AD8336-EVALZ, is available online for the AD8336. Figure 82 is a photo of the board. The board is shipped from the factory configured for a non- inverting preamplifier gain of 4×. To change the value of the gain of the preamplifier or to change the gain polarity to inverting, alter the component values or install components in the alternate locations provided. All components are standard 0603 size, and the board is compliant with RoHS requirements. Table 6 shows the components to be removed and added to change the amplifier configuration to inverting gain. Table 6. Component Changes for Inverting Configuration Remove Install R4, R7 R5, R6 OPTIONAL CIRCUITRY The AD8336 features differential inputs for the gain control, permitting nonzero or floating gain control inputs. To avoid any delay in making the board operational, the gain input circuit is shipped with Pin GNEG connected to ground via a 0 Ω resistor in the R17 location. The user can adjust the gain of the device by driving the GPOS test loop with a power supply or voltage reference. Optional resistor networks R15/R17 and R13/R14 provide fixed-gain bias voltages at Pin GNEG and Pin GPOS for non-zero common-mode voltages. The gain control can also be driven with an active input such as a ramp. Provision is made for an optional SMA connector at PRVG for monitoring the preamplifier output or for driving the VGA from an external source. Remove the 0 Ω resistor at R9 to isolate the preamplifier from an external generator. The capacitor at Location C1 limits the bandwidth of the preamplifier. BOARD LAYOUT CONSIDERATIONS The evaluation board uses four layers, with power and ground planes located between two conductor layers. This arrangement is highly recommended for customers, and several views of the board are provided as reference for board layout details. When laying out a printed circuit board for the AD8336, remember to provide a pad beneath the device to solder the exposed pad of the matching device. The pad in the board must have at least five vias to provide a thermal path for the chip scale package. Unlike leaded devices, the thermal pad is the primary means to remove heat dissipated within the device. Figure 82. AD8336 Evaluation Board Figure 83. Component Side Copper Figure 84. Secondary Side Copper |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |