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ADRF6510ACPZ-R7 数据表(PDF) 24 Page - Analog Devices

部件名 ADRF6510ACPZ-R7
功能描述  Dual Programmable Filters Variable Gain Amplifiers
PDF  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADRF6510ACPZ-R7 数据表(HTML) 24 Page - Analog Devices

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ADRF6510
Data Sheet
Rev. B | Page 24 of 32
EVALUATION BOARD
The ADRF6510 evaluation board is available with software
control to program the filter bandwidth. It is a 4-layer board
with split ground plane for analog and digital sections. Special
care is taken to place the power decoupling capacitors close to
the device pins. The board is designed for easy single-ended
(through a Mini-Circuits® ADT8-1T+ 8:1 balun) or differential
configuration for each channel.
EVALUATION BOARD CONTROL SOFTWARE
The ADRF6510 evaluation board is configured with a USB-
friendly interface to program the filter bandwidth of the
ADRF6510. The software GUI (see Figure 59) allows users to
select a particular frequency to write to the device and also
to read back data from the SDO pin that shows the currently
programmed filter setting. The software setup files can be down-
loaded from the ADRF6510 product page at www.analog.com.
Figure 59. Evaluation Control Software
SCHEMATICS AND ARTWORK
VPSD
COMD
LE
CLK
DATA
SDO
COM
VPS
OPP1
OPM1
COM
GAIN
VOCM
COM
OPM2
OPP2
COM
INP2
INM2
VPS
COM
OFDS
OFS2
VPS
ENBL
INP1
INM1
VPS
COM
GNSW
OFS1
VPS
ADRF6510
VPSD
VPS
VPS
VOCM
VPS
VGAIN
VPS
VPS
VPS
VPS
R2
0Ω
INP2
INM2_SE_P
R49
0Ω
R32
0Ω
R50
0Ω
R53
0Ω
R3
10kΩ
R5
0Ω
R6
0Ω
R15
OPEN
R46
OPEN
R16
OPEN
R44
OPEN
R51
OPEN
R52
OPEN
R54
0Ω
C7
100nF
C3
0.1µF
C4
0.1µF
C5
0.1µF
C15
0.1µF
C17
0.1µF
C18
0.1µF
VGAIN
VOCM
C13
1000pF
R4
10kΩ
P3
C16
0.1µF
C14
1000pF
C12
0.1µF
C11
0.1µF
C8
100nF
T1
1
3
6
5
4
INP1
INM1_SE_P
R47
0Ω
R31
0Ω
R48
0Ω
R57
0Ω
R17
OPEN
R45
OPEN
R18
OPEN
R43
OPEN
R55
OPEN
R56
OPEN
R58
0Ω
C9
100nF
C6
0.1µF
C10
100nF
P4
T2
1
3
6
5
4
P2
VPS
LE
CLK
DATA
SDO
R29
100Ω
C27
330pF
R34
0Ω
R30
100Ω
R33
0Ω
C27
330pF
R1
10kΩ
T4
1
3
6
5
4
OPP2
OPM2_SE_P
R42
0Ω
R35
0Ω
R9
300Ω
R10
300Ω
R36
0Ω
R38
OPEN
R23
OPEN
R40
OPEN
R22
OPEN
R14
OPEN
R13
OPEN
C21
100nF
C22
100nF
C24
0.1µF
T3
1
3
6
5
4
OPP1
OPM1_SE_P
R41
0Ω
R19
0Ω
R7
300Ω
R8
300Ω
R20
0Ω
R37
OPEN
R24
OPEN
R39
OPEN
R21
OPEN
R12
OPEN
R11
OPEN
C19
100nF
C20
100nF
C23
0.1µF
VPOS
DIG_VPOS
VPOSD
L2
33µH
C2
10µF
C1
10µF
L1
33µH
VPOS
COMD
COM
NET NAME
TEST POINT
SMA INPUT/OUTPUT
DIGITAL GROUND
ANALOG GROUND
LEGEND
Figure 60. Evaluation Board Schematic



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