AD8432ACPZ-R7 datasheet(21/32 Pages) AD

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Data Sheet

AD8432

Rev. D | Page 21 of 32

APPLICATIONS INFORMATION

The AD8432 LNA provides precision gain and ultralow noise

performance with minimal external components. Because it is

a high performance part, care must be taken to ensure that it is

configured optimally to attain the best performance and dynamic

range for the system.

TYPICAL SETUP

The internal bias circuitry of the AD8432 sets the input bias

voltage at 3.25 V and the output bias voltage at 2.5 V. It is important

to ac couple the inputs through a capacitor to maintain the internal

dc bias levels. When active input termination is used (RFB), a

decoupling capacitor (CFB) is required to isolate the input and

output bias voltages of the LNA. A typical value for CFB is 0.1 μF, but

a smaller value capacitor is more appropriate at higher frequencies.

The unterminated input impedance of the AD8432 is 6.2 kΩ.

Any input resistance between 50 Ω and 6.2 kΩ can be synthesized

using active impedance matching.

At the lowest gain (12.04 dB), the gain response exhibits some

peaking at higher frequencies. A resistor-capacitor shunt net-

work (RC) at the input (see RSHx and CSHx in Figure 69) is

recommended to reduce gain peaking and enhance stability at

higher frequencies.

Table 7 shows the recommended values of RFB, CSH, and RSH for

all four gains and several input impedance combinations. The

values for the CSH and RSH network are determined empirically

and can be customized as needed to optimize performance. As

RIN increases, the value of CSH diminishes, and for higher input

impedance values, no capacitor may be required.

RSH2

15Ω

CSH2

47pF

OUT2+

OUT2–

LNA2

0.1µF

120nH

IN2

INL2

IND2

INH2

OPH2

OPL2

GMH2

GOH2

GOL2

GML2

RFB2

CFB2

0.1µF

CFB1

0.1µF

AD8432

RSH1

15Ω

CSH1

47pF

OUT1+

OUT1–

LNA1

BIAS

0.1µF

120nH

IN1

INL1

IND1

INH1

OPH1

OPL1

GMH1

GOH1

GOL1

GML1

120nH

RFB1

G = 12dB

COMM

VPS2

VPS1

ENB

Figure 69. Typical AD8432 Setup, G = 12.04 dB

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