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ADL5336ACPZ-R7 数据表(PDF) 20 Page - Analog Devices |
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ADL5336ACPZ-R7 数据表(HTML) 20 Page - Analog Devices |
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20 / 30 page ![]() ADL5336 Data Sheet Rev. C | Page 20 of 30 APPLICATIONS INFORMATION BASIC CONNECTIONS The basic connections for a typical ADL5336 application are shown in Figure 63. SUPPLY DECOUPLING A nominal supply voltage of 5.0 V should be applied to the supply pins. The supply voltage should be between the limits of 4.5 V and 5.5 V. All of the supply pins must be decoupled to ground with at least one low inductance, surface-mount ceramic capacitor of 0.1 µF. Place these decoupling capacitors as close as possible to the ADL5336 device. The ADL5336 has an analog supply and a digital supply. Take care to separate the two supplies with a large surface-mount inductor of 33 µH, and each supply must then be decoupled separately to their respective grounds through a 10 µF capacitor. The ADL5336 also has two separate grounds: an analog ground and a digital ground. Again, a large surface-mount inductor of 33 µH should be used to separate the grounds. INPUT SIGNAL PATH The ADL5336 has three input signal paths, two of which inputs go to VGA2 via an internal switch, and the other input goes to VGA1. Each of the three pairs of input pins (INP1/INM1, IP2A/IM2A, and IP2B/IM2B) has a differential input impedance of 200 Ω. To obtain maximum power transfer, the driving source impedance also needs to be 200 Ω. On the evaluation board, this is achieved via a 4:1 impedance ratio balun. The evaluation board schematic is shown in Figure 70. For more information on the input signal paths, refer to the Input Signal Path section. The input common-mode voltage sits at roughly VPOS/2 for both VGAs, except on VGA2; the nonselected input of VGA2 has an input common-mode voltage that sits at roughly ground. OUTPUT SIGNAL PATH There are two output signal paths on the ADL5336: one signal path per VGA. The output of VGA1 can be ac-coupled into either of the inputs of VGA2, which cascades the two VGAs, or ac-coupled into a 200 Ω termination impedance. VGA1 is designed to drive a 200 Ω differential load, whereas VGA2 is designed to drive a 100 Ω differential load. On the evaluation board, a 100 Ω differential impedance is presented to the output of VGA2. This is achieve via a 1:1 balun and a resistive matching network. For more information on the evaluation board, see the evaluation board schematic in Figure 70. The output common-mode voltage on both VGAs sits at roughly VPOS/2. VPOS DATA VCM2 SDO COM OPM2 OPP2 VPOS ENBL INM1 VPOS VPOS ADL5336 MODE INP1 COM VCM1 +5V +5V INPUT 1 SPI CONTROL VPOS VPOS +5V +5V OUTPUT 1 INPUT 3 OUTPUT 2 INPUT 2 OUTPUT 1 BALUN INPUT 3 BALUN OUTPUT 2 BALUN INPUT 1 BALUN INPUT 2 BALUN Figure 63. Basic Connections Schematic |
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