Rail-to-Rail, Very Fast, 2.5 V to 5.5 V,

Single-Supply CML Comparators

Data Sheet

ADCMP606/ADCMP607

Rev. C

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FEATURES

CML-compatible output stage

1.25 ns propagation delay

50 mW at 2.5 V power supply

Shutdown pin

Single-pin control for programmable hysteresis and latch

(ADCMP607 only)

Power supply rejection > 60 dB

−40°C to +125°C operation

APPLICATIONS

High speed instrumentation

Clock and data signal restoration

Logic level shifting or translation

Pulse spectroscopy

High speed line receivers

Threshold detection

Peak and zero-crossing detectors

High speed trigger circuitry

Pulse-width modulators

Current-/voltage-controlled oscillators

Automatic test equipment (ATE)

GENERAL DESCRIPTION

The ADCMP606 and ADCMP607 are very fast comparators

fabricated on XFCB2, an Analog Devices, Inc., proprietary

process. These comparators are exceptionally versatile and easy

TTL-/CMOS-compatible latch inputs with adjustable hysteresis

and/or shutdown inputs.

The devices offer 1.25 ns propagation delay with 2.5 ps rms

random jitter (RJ). Overdrive and slew rate dispersion are

typically less than 50 ps.

A flexible power supply scheme allows the devices to operate

with a single +2.5 V positive supply and a −0.5 V to +2.7 V

input signal range up to a +5.5 V positive supply with a −0.5 V

to +5.7 V input signal range. The ADCMP607 features split

input/output supplies with no sequencing restrictions to

support a wide input signal range with independent output

swing control and power savings.

The CML-compatible output stage is fully back-matched for

superior performance. The comparator input stage offers robust

protection against large input overdrive, and the outputs do not

phase reverse when the valid input signal range is exceeded. On

the ADCMP607, latch and programmable hysteresis features are

also provided with a unique single-pin control option.

The ADCMP606 is available in a 6-lead SC70 package and the

ADCMP607 is available in a 12-lead LFCSP package.

FUNCTIONAL BLOCK DIAGRAM

INPUT

INPUT

(ADCMP607 ONLY)

Q OUTPUT

Q OUTPUT

LE/HYS INPUT (ADCMP607 ONLY)

ADCMP606/

ADCMP607

CML

Figure 1.