LTC6752ISC6-1 datasheet(22/30 Pages) AD

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LTC6752/LTC6752-1/

LTC6752-2/LTC6752-3/

LTC6752-4

6752fc

For more information www.linear.com/LTC6752

Typical applicaTions

High Speed Clock Restoration/Level Translation

Circuit

High speed comparators are often used in digital systems

to recover distorted clock waveforms. The separate input/

output supplies feature of the LTC6752-2 allows it to be

used in applications where signals need to be shifted from

onevoltagedomaintoanother.Figure8showsacircuitthat

can perform both recovery and level translation functions.

In this application, the input clock signal comes from a

source operating from 5V, and the signal is required to

driveareceiveroperatingon1.8V.The5Vinputsupply/1.8V

outputsupplyfeatureofthispartisidealforsuchasituation.

If the input signal gets distorted and its amplitude severely

reduced due to stray capacitance, stray inductance or due

to reflections on the transmission line, the LTC6752-2 can

be used to convert it into a full scale digital output signal

that can drive the receiver.

Figure 9 shows the input and output waveforms of the

LTC6752-2,usedtorecoveradistorted150mVP-P200MHz

signal at a common mode of 2.5V with respect to its nega-

tivesupply,intoafullscale1.8Voutputsignal.AC-coupling

could have been used at the input of the comparator, how-

ever to preserve input duty cycle information DC-coupling

may be preferable, and that is where having a wide input

common mode range is an advantage.

Optical Receiver Circuit

The LTC6752, along with a high speed high performance

FET input operational amplifier like the LTC6268, can be

usedtoimplementanopticalreceiverasshowninFigure10.

Figure 11 shows the output of the LTC6268 driving the –IN

pin of the LTC6752-2, the +IN pin of the LTC6752-2, and

the LTC6752-2 output. The photodiode is being driven by

a light source of sinusoidally varying intensity.

Figure 10. Optical Receiver Circuit

Figure 9

VOUT, 500mV/DIV

VIN, 50mV/DIV

2ns/DIV

6752 F09

VREF

3.3V

5.49k

20k

–

LTC6268

0V TO 3.3VOUT

6752 F10

–

VCC

LTC6752-2

VDD

VEE

LE/HYST

SHDN

4.53k

0.1µF

47.6k

FCI-125

Figure 8. High Speed Clock Restoration/Level

Translation/Level Shifting Circuit

–

VCC

VDD

VEE + 1.8V

VEE

VEE + 1.8V

VEE + 5V

6752 F08

200MHz

CLOCK

SIGNAL

ATTENUATED

150mVP-P

200MHz,

VCM = 2.5V

~1.8VP-P

200MHz,

CLOCK

SIGNAL

LONG

TRACE

VEE

VREF = VEE + 2.5V

CLOCK/DATA

RECEIVER

LTC6752-2

VEE

CLOCK/DATA

SOURCE

LTC6752ISC6-1 数据表(PDF) 22 Page - Analog Devices

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