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STV9212 数据表(PDF) 7 Page - STMicroelectronics |
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STV9212 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 34 page  7/34 STV9212 Functional Description Table 2: ICP Timing Trigger Source Trigger Event BCSC1 BCSC0 BCEDGE BLKPOL Timing Diagram HS pin Trailing edge 00 0 Don’t care Leading edge 00 1 Don’t care Pulse 1 Don’t care Don’t care Don’t care BLK Rising edge 01 00 11 Falling edge 01 01 10 Figure 4: Video Input Clamp HS ICP negative or positive 0.33µs...1.33µs HS ICP negative or positive 0.33µs...1.33µs HS ICP (must be positive!) BLK ICP 0.33µs...1.33µs BLK ICP 0.33µs...1.33µs IN1 1 High Impedance Note: Identical for IN2 and IN3 inputs stage To further processing ICP Input video 0V 0V 0V VRef = Internal reference voltage (fixed) DC signal from clamped to GND VRef graphics card (can vary) |
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