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TAS5000 数据表(PDF) 19 Page - Texas Instruments |
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TAS5000 数据表(HTML) 19 Page - Texas Instruments |
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19 / 24 page ![]() 3–3 3.4.2 Serial Audio Ports Master Mode Load conditions: 50pF (TA = 25°C, DVDD1 = DVDD2 = DVDD3_L = DVDD3_R = AVDD1 = AVDD2 = 3.3 V ±10%) PARAMETER MIN TYP MAX UNIT t(MSD) MCLK to SCLK 0 5 ns t(MLRD) MLCK to LRCLK 0 5 ns SCLK, LRCLK duty cycle 50% 3.4.3 DSP Serial Interface Mode (TA = 25°C, DVDD1 = DVDD2 = DVDD3_L = DVDD3_R = AVDD1 = AVDD2 = 3.3 V ±10%) PARAMETER MIN TYP MAX UNIT f(SCLK) SCLK frequency 6.144 MHz tW(FSHIGH) Pulse duration, sync 1/(64 ×fs) ns tsu(SDIN), tsu(LRCLK) SDIN and LRCLK setup time before SCLK falling edge 20 ns th(SDIN), th(LRCLK) SDIN and LRCLK hold time from SCLK falling edge 10 ns SCLK duty cycle 50% |
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